Revision 5.03 – June 14, 2006
S5320 – PCI Match Maker: PCI Configuration Registers
Data Sheet
Revision Identification Register (RID)
This register is reserved for AMCC’s S5320 silicon
revision identification number. The register defaults to
that value after power up. Write operations from the
PCI interface have no effect on the register. User-
defined values can be boot-loaded from an optional
external non-volatile. AMCC does not recommend
changing the register value. The Sub-system Vendor
ID and/or Subsystem ID are intended for end user
information.
Revision Identification
Register Name:
Address Offset:
Power-up value:
Boot-load:
08h
00h
External nvRAM/EPROM offset 048h
R/W
Attribute:
8 Bits
Size:
Figure 10. Revision Identification Register
7
0
00h
Revision Identification Number (RO)
Bit
Description
Revision Identification Number: Initialized to the S5320 silicon revision.
7:0
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DS1656
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