MAX 7000 Programmable Logic Device Family Data Sheet
Table 33. EPM7192S Internal Timing Parameters (Part 2 of 2)
Note (1)
Symbol
Parameter
Conditions
Speed Grade
-10
Min Max Min Max Min Max
Unit
-7
-15
tXZ
tSU
tH
Output buffer disable delay
Register setup time
C1 = 5 pF
4.0
5.0
6.0
ns
ns
ns
ns
1.1
1.7
2.3
2.0
3.0
3.0
4.0
4.0
2.0
Register hold time
tFSU
Register setup time of fast
input
tFH
Register hold time of fast
input
0.7
0.5
1.0
ns
tRD
Register delay
1.4
1.2
3.2
3.1
2.5
2.7
2.7
2.4
2.0
2.0
5.0
5.0
1.0
3.0
3.0
1.0
11.0
1.0
1.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCOMB
tIC
Combinatorial delay
Array clock delay
Register enable time
Global control delay
Register preset time
Register clear time
PIA delay
6.0
6.0
tEN
tGLOB
tPRE
tCLR
tPIA
1.0
4.0
4.0
(7)
(8)
2.0
tLPA
Low-power adder
10.0
13.0
Notes to tables:
(1) These values are specified under the recommended operating conditions shown in Table 11. See Figure 13 for more
information on switching waveforms.
(2) This minimum pulse width for preset and clear applies for both global clear and array controls. The t
parameter
LPA
must be added to this minimum width if the clear or reset signal incorporates the t
parameter into the signal
LAD
path.
(3) This parameter is a guideline that is sample-tested only and is based on extensive device characterization. This
parameter applies for both global and array clocking.
(4) These parameters are measured with a 16-bit loadable, enabled, up/ down counter programmed into each LAB.
(5) The f
values represent the highest frequency for pipelined data.
MAX
(6) Operating conditions: V
= 3.3 V ± 10% for commercial and industrial use.
CCIO
(7) For EPM7064S-5, EPM7064S-6, EPM7128S-6, EPM7160S-6, EPM7160S-7, EPM7192S-7, and EPM7256S-7 devices,
these values are specified for a PIA fan-out of one LAB (16 macrocells). For each additional LAB fan-out in these
devices, add an additional 0.1 ns to the PIA timing value.
(8) The t
parameter must be added to the t
, t
, t , t , t
, t
, and t
parameters for macrocells
LPA
LAD LAC IC EN SEXP ACL
CPPW
running in the low-power mode.
Altera Corporation
47
ALTERA [ ALTERA CORPORATION ]
