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EPM240T100C5 参数 Datasheet PDF下载

EPM240T100C5图片预览
型号: EPM240T100C5
PDF下载: 下载PDF文件 查看货源
内容描述: [最大II器件]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices  
13–17  
Boundary-Scan Description Language (BSDL) Support  
Boundary-Scan Description Language (BSDL) Support  
The BSDL—a subset of VHDL—provides a syntax that allows you to describe the  
features of an IEEE Std. 1149.1 BST-capable device that can be tested. Test software  
development systems then use the BSDL files for test generation, analysis, failure  
diagnostics, and in-system programming.  
f
For more information, or to receive BSDL files for IEEE Std. 1149.1-compliant MAX II  
devices, refer to the Altera website at www.altera.com.  
Conclusion  
The IEEE Std. 1149.1 BST circuitry available in MAX II devices provides a cost-  
effective and efficient way to test systems that contain devices with tight lead spacing.  
Circuit boards with Altera and other IEEE Std. 1149.1-compliant devices can use the  
EXTEST, SAMPLE/PRELOAD, and BYPASSmodes to create serial patterns that  
internally test the pin connections between devices and check device operation.  
1
Institute of Electrical and Electronics Engineers, Inc. IEEE Standard Test Access Port  
and Boundary-Scan Architecture (IEEE Std. 1149.1-2001). New York: Institute of  
Electrical and Electronics Engineers, Inc., 2001.  
Referenced Documents  
This chapter references the following documents:  
DC and Switching Characteristics chapter in the MAX II Device Handbook  
In-System Programmability Guidelines for MAX II Devices chapter in the MAX II  
Device Handbook  
JTAG and In-System Programmability chapter in the MAX II Device Handbook  
MAX II Architecture chapter in the MAX II Device Handbook  
© October 2008 Altera Corporation  
MAX II Device Handbook  
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