Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices
Boundary-Scan Description Language (BSDL) Support
13–17
Boundary-Scan Description Language (BSDL) Support
The BSDL—a subset of VHDL—provides a syntax that allows you to describe the
features of an IEEE Std. 1149.1 BST-capable device that can be tested. Test software
development systems then use the BSDL files for test generation, analysis, failure
diagnostics, and in-system programming.
f
For more information, or to receive BSDL files for IEEE Std. 1149.1-compliant MAX II
devices, refer to the Altera website at
Conclusion
The IEEE Std. 1149.1 BST circuitry available in MAX II devices provides a cost-
effective and efficient way to test systems that contain devices with tight lead spacing.
Circuit boards with Altera and other IEEE Std. 1149.1-compliant devices can use the
EXTEST, SAMPLE/PRELOAD,
and
BYPASSmodes
to create serial patterns that
internally test the pin connections between devices and check device operation.
1
Institute of Electrical and Electronics Engineers, Inc. IEEE Standard Test Access Port
and Boundary-Scan Architecture (IEEE Std. 1149.1-2001). New York: Institute of
Electrical and Electronics Engineers, Inc., 2001.
Referenced Documents
This chapter references the following documents:
■
■
chapter in the
MAX II Device Handbook
chapter in the
MAX II
Device Handbook
chapter in the
MAX II Device Handbook
chapter in the
MAX II Device Handbook
■
■
ALTERA [ ALTERA CORPORATION ]
