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EPM240T100C5N 参数 Datasheet PDF下载

EPM240T100C5N图片预览
型号: EPM240T100C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices
I/O Voltage Support in JTAG Chain
13–15
I/O Voltage Support in JTAG Chain
There can be several different Altera or non-Altera devices in a JTAG chain. However,
you should be cautious if the chain contains devices that have different V
CCIO
levels.
The
TDO
pin of a device drives out at the voltage level according to the V
CCIO
of the
device. For MAX II devices, the
TDO
pin will drive out at the voltage level according
to the V
CCIO
of I/O Bank 1. The devices can interface with each other although they
might have different V
CCIO
levels. For example, a device with 3.3-V V
CCIO
can drive to a
device with 5.0-V V
CCIO
because 3.3 V meets the minimum VIH on TTL-level input for
the 5.0-V V
CCIO
device. JTAG pins on MAX II devices can support 1.5-, 1.8-, 2.5-, or
3.3-V input levels, depending on the V
CCIO
voltage of I/O Bank 1.
f
Refer to the
chapter in the
MAX II Device Handbook
for more
information on MultiVoltTM I/O support.
You can interface the
TDI
and
TDO
lines of the JTAG pins of devices that have
different V
CCIO
levels by inserting a level shifter between the devices. If possible, the
JTAG chain should be built such that a device with a higher V
CCIO
level drives to a
device with an equal or lower V
CCIO
level. By building the JTAG chain in this manner, a
level shifter may be required only to shift the
TDO
level to a level acceptable to the
JTAG tester.
shows the JTAG chain of mixed voltages and how a level
shifter is inserted in the chain.
Figure 13–13.
JTAG Chain of Mixed Voltages
Must be 5.0-V
Tolerant
Must be 3.3-V
Tolerant
TDI
5.0-V
V
CCIO
3.3-V
V
CCIO
2.5-V
V
CCIO
Tester
TDO
Level
Shifter
1.5-V
V
CCIO
1.8-V
V
CCIO
Shift TDO to Level
Accepted by Tester
if Necessary
Must be 1.8-V
Tolerant
Must be 2.5-V
Tolerant
BST for Programmed Devices
For a programmed device, the input buffers are turned off by default for I/O pins that
are set as output only in the design file. You cannot sample on the programmed device
output pins with the default BSDL file when the input buffers are turned off. You can
set the Quartus II software to always enable the input buffers on a programmed
device so it behaves the same as an unprogrammed device for boundary-scan testing,
allowing sample function on output pins in the design. This aspect can cause slight
increase in standby current as the unused input buffer is always on.
1. On the Assignments menu, click
Settings.
2. Under
Category,
select
Assembler.
3. Turn on
Always Enable Input Buffers.