13–14
Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing for MAX II Devices
IEEE Std. 1149.1 BST Operation Control
IDCODE Instruction Mode
The
IDCODE
instruction mode is used to identify the devices in an IEEE Std. 1149.1
chain. When
IDCODE
is selected, the device identification register is loaded with the
32-bit vendor-defined identification code. The device ID register is connected between
the
TDI
and
TDO
ports, and the device
IDCODE
is shifted out.
1
The
IDCODE
for MAX II devices are listed in the
chapter in the
MAX II Device Handbook.
USERCODE Instruction Mode
The
USERCODE
instruction mode is used to examine the user electronic signature
(UES) within the devices along an IEEE Std. 1149.1 chain. When this instruction is
selected, the device identification register is connected between the
TDI
and
TDO
ports. The user-defined UES is shifted into the device ID register in parallel from the
32-bit
USERCODE
register. The UES is then shifted out through the device ID register.
The
USERCODE
information is available to the user only after the device is configured
successfully.
The non-volatile
USERCODE
data is written to the configuration flash memory (CFM)
block and then written to the SRAM at power-up. The
USERCODE
instruction reads
the data values from the SRAM. When using real-time ISP to update the CFM block
and write new
USERCODE
data, executing the
USERCODE
instruction returns the
current running design’s
USERCODE
(stored in the SRAM), not the new
USERCODE
data. The new design’s
USERCODE,
stored in the CFM, can only be read back correctly
if a power cycle or forced SRAM download has transpired after the real-time ISP
update.
In the Quartus II software, there is an
Auto Usercode
feature where you can choose to
use the checksum value of a programming file as the JTAG user code. If selected, the
checksum will be automatically loaded to the
USERCODE
register. On the Assignments
menu, click
Device.
In the Device dialog box, click
Device and Pin Options
and click
the General tab. Turn on
Auto Usercode.
CLAMP Instruction Mode
The
CLAMP
instruction mode is used to allow the state of the signals driven from the
pins to be determined from the boundary-scan register while the bypass register is
selected as the serial path between the
TDI
and
TDO
ports. The state of all signals
driven from the output pins will be completely defined by the data held in the
boundary-scan register. However, CLAMP will not override the I/O weak pull-up
resistor or the I/O bus hold if you have any of them selected.
HIGHZ Instruction Mode
The
HIGHZ
instruction mode is used to set all of the user I/O pins to an inactive drive
state. These pins are tri-stated until a new JTAG instruction is executed. When this
instruction is selected, the bypass register is connected between the
TDI
and
TDO
ports.
HIGHZ
will not override the I/O weak pull-up resistor or the I/O bus hold if
you have any of them selected.
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