9–24
Chapter 9: Using User Flash Memory in MAX II Devices
Software Support for UFM Block
Figure 9–24.
Page 4 of the altufm MegaWizard Plug-In Manager (I
2
C)
Serial Peripheral Interface
Serial peripheral interface (SPI) is a four-pin serial communication subsystem
included on the Motorola 6805 and 68HC11 series microcontrollers. It allows the
microcontroller unit to communicate with peripheral devices, and is also capable of
inter-processor communications in a multiple-master system.
The SPI bus consists of masters and slaves. The master device initiates and controls
the data transfers and provides the clock signal for synchronization. The slave device
responds to the data transfer request from the master device. The master device in an
SPI bus initiates a service request with the slave devices responding to the service
request.
With the altufm megafunction, the UFM and MAX II logic can be configured as a
slave device for the SPI bus. The
OSC_ENA
is always asserted to enable the internal
oscillator when the SPI megafunction is instantiated for both read only and
read/write interfaces.
The Quartus II software supports both the Base mode (which uses 8-bit address and
data) and the Extended mode (which uses 16-bit address and data). Base mode uses
only UFM sector 0 (2,048 bits), whereas Extended mode uses both UFM sector 0 and
sector 1 (8,192 bits). There are only four pins in SPI:
SI, SO, SCK,
and
nCS.
describes the SPI pins and functions.
ALTERA [ ALTERA CORPORATION ]
