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EPM240T100C5N 参数 Datasheet PDF下载

EPM240T100C5N图片预览
型号: EPM240T100C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 9: Using User Flash Memory in MAX II Devices  
9–27  
Software Support for UFM Block  
1. nCSis pulled low to indicate the start of transmission.  
2. An 8-bit READopcode (00000011) is received from the master device. (If internal  
programming is in progress, READis ignored and not accepted).  
3. A 16-bit address is received from the master device. The LSB of the address is  
received last. As the UFM block can take only nine bits of address maximum, the  
first seven address bits received are discarded.  
4. Data is transmitted for as many words as needed by the slave device through SO  
for READoperation. When the end of the UFM storage array is reached, the  
address counter rolls over to the start of the UFM to continue the READoperation.  
5. nCS is pulled back to high to indicate the end of transmission.  
For SPI Base mode, the READoperation is always performed through the following  
sequence in SPI:  
1. nCSis pulled low to indicate the start of transmission.  
2. An 8-bit READopcode (00000011) is received from the master device, followed by  
an 8-bit address. If internal programming is in progress, the READoperation is  
ignored and not accepted.  
3. Data is transmitted for as many words as needed by the slave device through SO  
for READoperation. The internal address pointer automatically increments until  
the highest memory address is reached (address 255 only since the UFM sector 0 is  
used). The address counter will not roll over once address 255 is reached. The SO  
output is set to high-impedance (Z) once all the eight data bits from address 255  
has been shifted out through the SOport.  
4. nCSis pulled back to high to indicate the end of transmission.  
Figure 9–26. READ Operation Sequence for Extended Mode  
nCS  
SCK  
0
1
2
3
4
5
6
7
8
9
10 11  
20 21 22 23 24 25 26 27  
36 37 38 39  
8-bit  
Instruction  
16-bit  
Address  
SI  
03H  
MSB  
MSB  
High Impendance  
SO  
16-bit Data Out 1  
16-bit Data Out 2  
MSB  
MSB  
© October 2008 Altera Corporation  
MAX II Device Handbook  
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