Chapter 9: Using User Flash Memory in MAX II Devices
Software Support for UFM Block
9–21
Figure 9–19.
Random Address Read Sequence
S
Slave
Address
R/W
A
Byte
Address
A
Sr
Slave
Address
R/W
A
Data
P
‘0’ (write)
S – Start Condition
Sr – Repeated Start
P – Stop Condition
A – Acknowledge
‘1’ (read)
From Master to Slave
From Slave to Master
Sequential Read
Sequential read operation can be initiated by either the current address read operation
or the random address read operation. Instead of sending a stop condition after the
Slave has transmitted one byte of data to the master, the master acknowledges that
byte and sends additional clock pulses (on SCL line) for the slave to transmit data
bytes from consecutive byte addresses. The operation is terminated when the master
generates a stop condition instead of responding with an acknowledge.
shows the sequential read sequence.
Figure 9–20.
Sequential Read Sequence
S
Slave
Address
R/W
A
Byte
Address
A
Sr
Slave
Address
R/W
A
Data
A
…
Data
P
‘0’ (write)
S – Start Condition
Sr – Repeated Start
P – Stop Condition
A – Acknowledge
‘1’ (read)
Data (n - bytes) + Acknowledgment (n - 1 bytes)
From Master to Slave
From Slave to Master
ALTERA [ ALTERA CORPORATION ]
