9–26
Chapter 9: Using User Flash Memory in MAX II Devices
Software Support for UFM Block
Table 9–10.
Instruction Set for SPI
Name
WREN
WRDI
RDSR
WRSR
READ
WRITE
SECTOR-ERASE
UFM-ERASE
Opcode
00000110
00000100
00000101
00000001
00000011
00000010
00100000
01100000
Operation
Enable Write to UFM
Disable Write to UFM
Read Status Register
Write Status Register
Read data from UFM
Write data to UFM
Sector erase
Erase the entire UFM
block (both sectors)
The
READ
and
WRITE
opcodes are instructions for transmission, which means the data
will be read from or written to the UFM.
WREN, WRDI, RDSR,
and
WRSR
are instructions for the status register, where they do
not have any direct interaction with UFM, but read or set the status register within the
interface logic. The status register provides status on whether the UFM block is
available for any
READ
or
WRITE
operation, whether the interface is
WRITE
enabled,
and the state of the UFM
WRITE
protection. The status register format is shown in
For the read only implementation of
ALTUFM
SPI (Base or Extended
mode), the status register does not exist, saving LE resources.
Table 9–11.
Status Register Format
Position
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Status
X
X
X
X
BP1
BP0
WEN
nRDY
Default at Power-Up
0
0
0
0
0
0
0
0
Description
—
—
—
—
Indicate the current level of block write protection
Indicate the current level of block write protection
1= SPI
WRITE
enabled state
0= SPI
WRITE
disabled state
1 = Busy, UFM
WRITE
or
ERASE
cycle in progress
0 = No UFM
WRITE
or
ERASE
cycle in progress
Note to
(1) Refer to
and
for more information about status register bits
BPI
and
BPO.
The following paragraphs describe the instructions for SPI.
READ
READ
is the instruction for data transmission, where the data is read from the UFM
block. When data transfer is taking place, the MSB is always the first bit to be
transmitted or received. The data output stream is continuous through all addresses
until it is terminated by a low-to-high transition at the
nCS
port. The
READ
operation
is always performed through the following sequence in SPI, as shown in
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