7. Reference & Ordering
Information
SGX51007-1.0
Stratix® GX devices are supported by the Altera® Quartus® II design
software, which provides a comprehensive environment for system-on-a-
programmable-chip (SOPC) design. The Quartus II software includes
hardware description language and schematic design entry, compilation
and logic synthesis, full simulation and advanced timing analysis,
SignalTap® logic analysis, and device configuration. See the Design
Software Selector Guide for more details on the Quartus II software
features.
Software
The Quartus II software supports the Windows 2000/NT/98, Sun Solaris,
Linux Red Hat v6.2 and HP-UX operating systems. It also supports
seamless integration with industry-leading EDA tools through the
NativeLink® interface.
Device pin-outs for Stratix GX devices will be released on the Altera web
site (www.altera.com).
Device Pin-Outs
Figure 7–1 describes the ordering codes for Stratix GX devices.
Ordering
Information
Figure 7–1. Stratix GX Device Packaging Ordering Information
EP1SGX
40
G
F
1020
C
7
N
Family Signature
Optional Suffix
EP1SGX: Stratix GX
Indicates specific device options or
shipment method.
N: Lead free
ES: Engineering sample
Device Type
10
25
40
Speed Grade
5, 6, or 7, with 5 being the fastest
Number of
Transceiver
Channels
Operating Temperature
C: 4
D: 8
F: 16
G: 20
C: Commercial temperature (t = 0˚ C to 85˚ C )
j
I: Industrial temperature (t = -40˚ C to 100˚ C )
j
Package Type
Pin Count
Number of pins for a particular FineLine BGA package
F: FineLine BGA
Altera Corporation
February 2005
7–1