DC & Switching Characteristics
Table 6–76. Stratix GX I/O Standard Output Delay Adders for Slow Slew Rate on Column Pins (Part 2 of 2)
-5 Speed Grade
-6 Speed Grade
-7 Speed Grade
I/O Standard
Unit
Min
Max
Min
Max
Min
Max
3.3-V LVTTL
4 mA
8 mA
1,993
1,773
1,553
1,493
1,423
2,631
2,051
1,941
1,901
4,632
3,542
3,472
6,620
6,040
5,570
1,191
1,231
1,111
1,111
1,111
1,311
1,311
1,391
1,431
1,291
1,912
1,832
3,097
2,867
4,916
4,726
3,247
3,257
2,097
1,866
1,635
1,572
1,498
2,768
2,159
2,043
2,001
4,873
3,728
3,655
6,964
6,355
5,862
1,255
1,297
1,171
1,171
1,171
1,381
1,381
1,465
1,507
1,360
2,013
1,929
3,260
3,018
5,174
4,975
3,417
3,428
2,411
2,145
1,879
1,807
1,722
3,182
2,482
2,349
2,300
5,604
4,287
4,203
8,008
7,307
6,740
1,442
1,90
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
12 mA
16 mA
24 mA
2 mA
2.5-V LVTTL
8 mA
12 mA
16 mA
2 mA
1.8-V LVTTL
1.5-V LVTTL
8 mA
12 mA
2 mA
4 mA
8 mA
GTL
GTL+
3.3-V PCI
1,346
1,346
1,346
1,587
1,587
1,684
1,732
1,563
2,314
2,218
3,748
3,470
5,950
5,721
3,929
3,941
3.3-V PCI-X 1.0
Compact PCI
AGP 1×
AGP 2×
CTT
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
SSTL-18 class I
SSTL-18 class II
1.5-V HSTL class I
1.5-V HSTL class II
1.8-V HSTL class I
1.8-V HSTL class II
Altera Corporation
June 2006
6–49
Stratix GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
