Timing Model
Table 4–43. Routing Delay Internal Timing Microparameter
Descriptions (Part 2 of 2)
Symbol
Parameter
tC4
Delay for a C4 line with average loading; covers a distance of four
LAB rows.
tC8
Delay for a C8 line with average loading; covers a distance of eight
LAB rows.
tC16
Delay for a C16 line with average loading; covers a distance of 16
LAB rows.
tLOCAL
Local interconnect delay, for connections within a LAB, and for the
final routing hop of connections to LABs, DSP blocks, RAM blocks
and I/Os.
Table 4–44. LE Internal Timing Microparameters
-5
-6
-7
-8
Parameter
Unit
Min
10
Max
Min
10
Max
Min
11
Max
Min
13
Max
tSU
ps
ps
ps
ps
ps
ps
ps
tH
100
100
114
135
tCO
156
366
176
459
202
527
238
621
tLUT
tCLR
tPRE
tCLKHL
100
100
100
100
114
114
135
135
1000
1111
1190
1400
Table 4–45. IOE Internal TSU Microparameter by Device Density (Part 1 of 2)
-5 -6 -7
-8
Unit
Device
Symbol
Min
Max
Min
Max
Min
Max
Min
80
Max
EP1S10
tSU_R
76
80
80
ps
tSU_C
tSU_R
tSU_C
tSU_R
tSU_C
tSU_R
tSU_C
176
76
80
80
80
ps
ps
ps
ps
ps
ps
ps
EP1S20
EP1S25
EP1S30
80
80
80
76
80
80
80
276
276
76
280
280
80
280
280
80
280
280
80
176
180
180
180
4–28
Altera Corporation
January 2006
Stratix Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
