Arria GX Architecture
tx_detectrxloopbackport in P0 power state puts the transceiver in
reverse parallel loopback. A high on the tx_detectrxloopbackport in
any other power state does not put the transceiver in reverse parallel
loopback.
As seen in Figure 2–21, the serial data received on the rx_datainport in
reverse parallel loopback goes through the CRU, deserializer, word
aligner, and the rate matcher blocks. The parallel data at the output of the
receiver rate matcher block is looped back to the input of the transmitter
serializer block. The serializer converts the parallel data to serial data and
feeds it to the transmitter output buffer that drives the data out on the
tx_dataoutport. The data at the output of the rate matcher also goes
through the 8B/10B decoder, byte deserializer, and receiver phase
compensation FIFO before being fed to the PLD on the rx_dataoutport.
Reset and Powerdown
Arria GX transceivers offer a power saving advantage with their ability to
shut off functions that are not needed.
The following three reset signals are available per transceiver channel
and can be used to individually reset the digital and analog portions
within each channel:
■
■
■
tx_digitalreset
rx_analogreset
rx_digitalreset
The following two powerdown signals are available per transceiver block
and can be used to shut down an entire transceiver block that is not being
used:
■
■
gxb_powerdown
gxb_enable
Altera Corporation
May 2008
2–29
Arria GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
