FLEX 10K Embedded Programmable Logic Family Data Sheet
Table 39. External Bidirectional Timing Parameters
Note (10)
Symbol
Parameter
Condition
t
t
t
t
t
Setup time for bidirectional pins with global clock at adjacent LE register
Hold time for bidirectional pins with global clock at adjacent LE register
Clock-to-output delay for bidirectional pins with global clock at IOE register
Synchronous IOE output buffer disable delay
INSUBIDIR
INHBIDIR
OUTCOBIDIR
XZBIDIR
Synchronous IOE output buffer enable delay, slow slew rate = off
ZXBIDIR
Notes to tables:
(1) Microparameters are timing delays contributed by individual architectural elements. These parameters cannot be
measured explicitly.
(2) Operating conditions:
VCCIO = 5.0 V ± 5% for commercial use in FLEX 10K devices.
VCCIO = 5.0 V ± 10% for industrial use in FLEX 10K devices.
VCCIO = 3.3 V ± 10% for commercial or industrial use in FLEX 10KA devices.
VCCIO = 3.3 V ± 10% for commercial or industrial use in FLEX 10K devices.
VCCIO = 2.5 V ± 0.2 V for commercial or industrial use in FLEX 10KA devices.
VCCIO = 2.5 V, 3.3 V, or 5.0 V.
(3) Operating conditions:
(4) Operating conditions:
(5) Because the RAM in the EAB is self-timed, this parameter can be ignored when the WEsignal is registered.
(6) EAB macroparameters are internal parameters that can simplify predicting the behavior of an EAB at its boundary;
these parameters are calculated by summing selected microparameters.
(7) These parameters are worst-case values for typical applications. Post-compilation timing simulation and timing
analysis are required to determine actual worst-case performance.
(8) External reference timing parameters are factory-tested, worst-case values specified by Altera. A representative
subset of signal paths is tested to approximate typical device applications.
(9) Contact Altera Applications for test circuit specifications and test conditions.
(10) These timing parameters are sample-tested only.
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