FLEX 10K Embedded Programmable Logic Family Data Sheet
Figure 30. EAB Synchronous Timing Waveforms
EAB Synchronous Read
WE
Address
CLK
a0
a1
a2
a3
tEABDATASU
tEABDATAH
tEABRCREG
tEABDATACO
Data-Out
d1
d2
EAB Synchronous Write (EAB Output Registers Used)
WE
din1
din2
a2
din3
a3
Data-In
a0
a1
a2
Address
tEABWESU
tEABDATAH
tEABWEH
tEABDATASU
CLK
tEABDATACO
tEABWCREG
dout0
dout1
din1
din2
din3
din2
Data-Out
Altera Corporation
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