PLLs in Stratix II and Stratix II GX Devices
Table 1–24. Stratix II GX Global and Regional Clock Outputs From PLLs (Part 2 of 3)
PLL Number and Type
EP2SGX60 through EP2SGX130 Devices
EP2SGX30 Devices
Notes (2), (3), and (4)
Clock Network
Enhanced
PLLs
Enhanced
Fast PLLs
Fast PLLs
PLLs
9 (1) 10(1) 11 12
1
2
3 (1) 4 (1)
5
6
7
8
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
RCLK0
RCLK1
RCLK2
RCLK3
v
v
v
v
RCLK4
RCLK5
RCLK6
RCLK7
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
RCLK8
RCLK9
RCLK10
RCLK11
RCLK12
RCLK13
RCLK14
RCLK15
RCLK16
RCLK17
RCLK18
RCLK19
RCLK20
RCLK21
RCLK22
RCLK23
RCLK24
RCLK25
RCLK26
RCLK27
v
v
v
v
v
v
v
v
Altera Corporation
July 2009
1–81
Stratix II Device Handbook, Volume 2
ALTERA [ ALTERA CORPORATION ]
