AV-51002
2017.02.10
2-47
Receiver High-Speed I/O Specifications
C3, I3L
Typ
C4, I4
Symbol
Conditions
Unit
Min
Max
Min
Typ
Max
Total Jitter for Data Rate
600 Mbps - 1.25 Gbps
—
—
160
—
—
160
ps
tx Jitter - True Differential I/O
Standards
Total Jitter for Data Rate
< 600 Mbps
—
—
—
45
—
—
—
50
0.1
300
0.2
55
—
—
—
45
—
—
—
50
0.1
325
0.25
55
UI
ps
UI
%
Total Jitter for Data Rate
600 Mbps - 1.25 Gbps
tx Jitter - Emulated Differential
I/O Standards with ree
External Output Resistor
Network
Total Jitter for Data Rate
< 600 Mbps
tDUTY
Transmitter output clock duty
cycle for both True and Emulated
Differential I/O Standards
True Differential I/O Standards
—
—
—
—
200
250
—
—
—
—
200
300
ps
ps
Emulated Differential I/O
Standards with three external
output resistor networks
tRISE & tFALL
True Differential I/O Standards
—
—
—
—
150
300
—
—
—
—
150
300
ps
ps
TCCS
Emulated Differential I/O
Standards
Receiver High-Speed I/O Specifications
Table 2-41: Receiver High-Speed I/O Specifications for Arria V GZ Devices
When J = 3 to 10, use the serializer/deserializer (SERDES) block.
When J = 1 or 2, bypass the SERDES block.
Arria V GZ Device Datasheet
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