AV-51002
2017.02.10
2-22
Reference Clock
Transceiver Speed Grade 2
Transceiver Speed Grade 3
Symbol/Description
Conditions
Unit
Min
Typ
Max
Min
Typ
Max
Rise time
Measure at 60 mV of
—
—
400
—
—
400
differential signal (138)
ps
Fall time
Measure at 60 mV of
—
—
400
—
—
400
differential signal (138)
Duty cycle
—
45
30
—
—
55
33
45
30
—
—
55
33
%
Spread-spectrum modulating
clock frequency
PCI Express ®(PCIe)
kHz
Spread-spectrum downspread
PCIe
—
0 to
—
—
0 to
—
%
–0.5
–0.5
On-chip termination resistors
Absolute VMAX
—
—
—
100
—
—
—
—
100
—
—
Ω
V
Dedicated reference clock
pin
1.6
1.6
RX reference clock pin
—
—
—
—
1.2
—
—
—
—
—
1.2
—
Absolute VMIN
—
—
–0.4
200
–0.4
200
V
Peak-to-peak differential input
voltage
1600
1600
mV
Dedicated reference clock
pin
1000/900/850 (139)
1000/900/850 (139)
mV
VICM (AC coupled)
VICM (DC coupled)
RX reference clock pin
1.0/0.9/0.85 (140)
—
1.0/0.9/0.85(140)
—
mV
mV
HCSL I/O standard for
PCIe reference clock
250
550
250
550
(138)
REFCLKperformance requires to meet transmitter REFCLKphase noise specification.
e reference clock common mode voltage is equal to the VCCR_GXB power supply level.
is supply follows VCCR_GXB
(139)
(140)
Arria V GZ Device Datasheet
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