AV-51002
2017.02.10
2-18
I/O Standard Specifications
Table 2-19: Differential SSTL I/O Standards for Arria V GZ Devices
VCCIO (V)
Typ
VSWING(DC) (V)
VX(AC) (V)
Typ
VSWING(AC) (V)
Max
I/O Standard
Min
Max
Min
Max
Min
Max
Min
SSTL-2 Class I,
II
2.375
2.5
2.625
0.3
VCCIO
+ 0.6
VCCIO/2
– 0.2
—
VCCIO/2
+ 0.2
0.62
VCCIO + 0.6
SSTL-18 Class I,
II
1.71
1.425
1.283
1.19
1.8
1.5
1.89
1.575
1.45
1.31
1.26
0.25
0.2
VCCIO
+ 0.6
VCCIO/2
– 0.175
—
—
VCCIO/2
+ 0.175
0.5
VCCIO + 0.6
(127)
(127)
(127)
SSTL-15 Class I,
II
VCCIO/2
– 0.15
VCCIO/2
+ 0.15
0.35
—
SSTL-135
Class I, II
1.35
1.25
1.2
0.2
VCCIO/2 VCCIO/2
– 0.15
VCCIO/2 2(VIH(AC)
+ 0.15 - VREF
2(VIL(AC) - VREF)
)
SSTL-125
Class I, II
0.18
0.18
VCCIO/2 VCCIO/2
– 0.15
VCCIO/2 2(VIH(AC)
+ 0.15
—
- VREF
)
SSTL-12
Class I, II
1.14
—
VREF
–0.15
VCCIO/2
VREF
+ 0.15
–0.30
0.30
Table 2-20: Differential HSTL and HSUL I/O Standards for Arria V GZ Devices
VCCIO (V)
Typ
VDIF(DC) (V)
Min Max
VX(AC) (V)
Typ
VCM(DC) (V)
Typ
VDIF(AC) (V)
Max
I/O Standard
Min
Max
Min
Max
Min
Max
Min
HSTL-18 Class
I, II
1.71
1.8
1.89
0.2
—
0.78
—
1.12
0.78
—
1.12
0.4
—
HSTL-15 Class
I, II
1.425 1.5
1.575
0.2
—
0.68
—
0.9
0.68
—
0.9
0.4
—
(127)
e maximum value for VSWING(DC) is not defined. However, each single-ended signal needs to be within the respective single-ended limits (VIH(DC)
and VIL(DC)).
Arria V GZ Device Datasheet
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