AV-51002
2017.02.10
2-19
I/O Standard Specifications
VCCIO (V)
Typ
VDIF(DC) (V)
VX(AC) (V)
Typ
VCM(DC) (V)
Typ
VDIF(AC) (V)
Max
I/O Standard
Min
Max
Min
Max
Min
Max
Min
Max
Min
HSTL-12 Class
I, II
1.14
1.2
1.26
0.16
VCCIO
+ 0.3
—
0.5 × VCCIO
—
0.4 ×
VCCIO
0.5 0.6 ×
0.3
VCCIO
+ 0.48
×
VCCIO
VCC
IO
HSUL-12
1.14
1.2
1.3
0.26
0.26
0.5 ×
VCCIO
0.12
0.5 × VCCIO
0.5 ×
VCCIO
+ 0.12
0.4 ×
VCCIO
0.5 0.6 ×
0.44
0.44
–
×
VCCIO
VCC
IO
Table 2-21: Differential I/O Standard Specifications for Arria V GZ Devices
VCCIO (V) (128)
Typ
VID (mV) (129)
Condition
VICM(DC) (V)
Condition
VOD (V) (130)
Typ
VOCM (V) (130)
Typ Max
I/O Standard
Min
Max
Min
Max
Min
Max
Min
Max
Min
PCML
Transmitter, receiver, and input reference clock pins of the high-speed transceivers use the PCML I/O standard. For transmitter,
receiver, and reference clock I/O pin specifications, refer to the "Transceiver Performance Specifications" section.
—
—
—
0.05
1.05
—
DMAX
≤
1.8
1.55
—
0.247
0.247
—
—
—
—
0.6
0.6
—
1.125
1.125
—
1.25
1.25
—
1.375
1.375
—
2.5 V
700 Mbps
VCM
=
LVDS
2.375
2.375
2.5
2.5
2.625
2.625
100
100
1.25 V
(131)
DMAX
700 Mbps
>
BLVDS
—
—
(132)
(128)
Differential inputs are powered by VCCPD which requires 2.5 V.
(129)
(130)
(131)
e minimum VID value is applicable over the entire common mode range, VCM.
RL range: 90 ≤ RL ≤ 110 Ω.
For optimized LVDS receiver performance, the receiver voltage input range must be between 0.25 V to 1.6 V for data rates above 700 Mbps, and 0 V
to 1.85 V for data rates below 700 Mbps.
(132)
ere are no fixed VICM, VOD, and VOCM specifications for BLVDS. ey depend on the system topology.
Arria V GZ Device Datasheet
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