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AK4685 参数 Datasheet PDF下载

AK4685图片预览
型号: AK4685
PDF下载: 下载PDF文件 查看货源
内容描述: 多通道编解码器的差分模拟I / O [Multi-channel CODEC with Differential Analog I/O]
分类和应用: 解码器编解码器
文件页数/大小: 52 页 / 575 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4685]  
Analog Outputs  
(Differential Mode)  
The analog outputs are fully differential outputs when the SGL pin = “L”, and the output range is 2.56 x (AVDD2)/5  
Vpp centered around analog common voltage (VCOM pin). The differential outputs are summed externally. The  
summing gain between L/ROUT+ and L/ROUT- is VL/ROUT = (L/ROUT+)-(L/ROUT-). If the summing gain is 1.09, the  
output range is 5.59Vpp (typ@VDD=5V). The bias voltage of the external summing circuit is supplied externally. The  
output voltage (VAOUT) is positive full scale for 7FFFFFH (@24-bits) and negative full scale for 800000H (@24-bits).  
The ideal VAOUT is 0V for 000000H(@24-bits).  
The internal switched-capacitor filters attenuate the noise generated by the delta-sigma modulator beyond the audio  
passband. Figure 12 and Figure 13 show examples of an external LPF circuit summing the differential outputs with an  
op-amp.  
7.5k  
8.2k  
L/ROUT-  
L/ROUT+  
R1  
R1  
270p  
Vop  
2200p  
8.2k  
Analog  
Out  
7.5k  
Vop  
270p  
1k  
0.1u  
BIAS  
47u  
When R1=300Ω  
fc=93.1kHz, Q=0.717, g=-0.1dB at 40kHz  
1k  
Figure 12. External 2nd order LPF Circuit Example (using op-amp with single power supply)  
7.5k  
8.2k  
L/ROUT-  
L/ROUT+  
R1  
R1  
270p  
+Vop  
2200p  
8.2k  
Analog  
Out  
7.5k  
-Vop  
270p  
When R1=300Ω  
fc=93.1kHz, Q=0.717, g=-0.1dB at 40kHz  
Figure 13. External 2nd order LPF Circuit Example (using op-amp with dual power supplies)  
(Single-ended Mode)  
The analog outputs are single-ended when the SGL pin = “H” and the signals are output from the L/ROUT+  
pins. In this case, the L/ROUT- pins should be opened. The output range is 2.8 x (AVDD2)/5 Vpp (typ)  
centered around the analog common voltage (VCOM pin).  
MS1106-E-00  
2009/08  
- 28 -  
 
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