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AK4492ECB 参数 Datasheet PDF下载

AK4492ECB图片预览
型号: AK4492ECB
PDF下载: 下载PDF文件 查看货源
内容描述: [Quality Oriented 32-Bit 2ch DAC]
分类和应用:
文件页数/大小: 101 页 / 2100 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4492]  
Audio Interface Format  
[1] PCM Mode  
(1) Input Data Format  
Data is shifted in via the SDATA pin using BICK and LRCK inputs. Eight data formats are supported and  
selected by the DIF2-0 pins (Pin control mode) or DIF[2:0] bits (Register control mode) as shown in Table  
24. In all formats the serial data is MSB first, 2's compliment format and is read on the rising edge of BICK.  
Mode 2 can be used for 20-bit and 16-bit MSB justified formats by zeroing the unused LSBs.  
Normal Mode (TDM[1:0] bits = “00” or TDM1-0 pins = LL)  
2ch Data is shifted in via the SDATA pin using BICK and LRCK inputs. Eight data formats are supported  
and selected by the DIF2-0 pins (Pin control mode) or DIF[2:0] bits (Register control mode) as shown in  
Table 24. In all formats the serial data is MSB first, 2's compliment format and is read on the rising edge of  
BICK. Mode 6 can be used for 24-bit, 20-bit and 16-bit MSB justified formats by zeroing the unused LSBs.  
TDM128 Mode (TDM[1:0] bits = “01” or TDM1-0 pins = LH)  
4ch Data is shifted in via the SDATA pin using BICK and LRCK inputs. Data slot can be selected by  
SDS[2:0] bits (Table 25). BICK is fixed to 128fs. Six data formats are supported and selected by the  
DIF2-0 pins (Pin control mode) or DIF[2:0] bits (Register control mode) as shown in Table 24. In all  
formats the serial data is MSB first, 2's compliment format and is read on the rising edge of BICK.  
TDM256 Mode (TDM[1:0] bits = “10” or TDM1-0 pins = HL)  
8ch Data is shifted in via the SDATA pin using BICK and LRCK inputs. Data slot can be selected by  
SDS[2:0] bits (Table 25). BICK is fixed to 256fs. Six data formats are supported and selected by the  
DIF2-0 pins (Pin control mode) or DIF[2:0] bits (Register control mode) as shown in Table 24. In all  
formats the serial data is MSB first, 2's compliment format and is read on the rising edge of BICK.  
TDM512 Mode (TDM[1:0] bits = “11” or TDM1-0 pins = HH)  
16ch Data is shifted in via the SDATA pin using BICK and LRCK inputs. Data slot can be selected by  
SDS[2:0] bits (Table 25). BICK is fixed to 512fs. Six data formats are supported and selected by the  
DIF2-0 pins (Pin control mode) or DIF[2:0] bits (Register control mode) as shown in Table 24. In all  
formats the serial data is MSB first, 2's compliment format and is read on the rising edge of BICK.  
016011073-E-00  
2016/12  
- 49 -  
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