[AK4492]
Figure
Table 24. Audio Interface Format
TDM1 TDM0 DIF2 DIF1 DIF0
LR
CK
Mode
SDATA Format
BICK
bit
bit
bit
bit
bit
0
1
2
0
0
0
0
0
1
0
1
0
16-bit LSB justified
20-bit LSB justified
24-bit MSB justified
16-bit I2S Compatible
24-bit I2S Compatible
24-bit LSB justified
32-bit LSB justified
32-bit MSB justified
32-bit I2S Compatible
N/A
H/L
H/L
H/L
L/H
Figure 25
Figure 26
Figure 27
32fs
40fs
48fs
32fs
3
0
1
1
Figure 28
Normal
(Note 49)
L/H
0
0
48fs
4
5
6
7
-
1
1
1
1
-
0
0
1
1
-
0
1
0
1
-
H/L
H/L
H/L
L/H
-
Figure 26
Figure 29
Figure 30
Figure 31
-
48fs
64fs
64fs
64fs
-
-
-
-
-
N/A
-
-
-
8
9
0
0
1
1
1
1
-
1
1
0
0
1
1
-
0
1
0
1
0
1
-
24-bit MSB justified
24-bit I2S Compatible
H/L 128fs
L/H 128fs
H/L 128fs
H/L 128fs
H/L 128fs
L/H 128fs
Figure 32
Figure 33
Figure 34
Figure 32
Figure 32
Figure 33
-
TDM128
TDM256
TDM512
0
1
1
1
0
1
10
11
12
13
-
24-bit LSB justified
32-bit LSB justified
32-bit MSB justified
32-bit I2S Compatible
N/A
-
-
-
-
-
-
-
-
N/A
-
14
15
16
17
18
19
-
0
0
1
1
1
1
-
1
1
0
0
1
1
-
0
1
0
1
0
1
-
24-bit MSB justified
24-bit I2S Compatible
24-bit LSB justified
32-bit LSB justified
32-bit MSB justified
32-bit I2S Compatible
N/A
H/L 256fs
L/H 256fs
H/L 256fs
H/L 256fs
H/L 256fs
L/H 256fs
Figure 35
Figure 36
Figure 37
Figure 35
Figure 35
Figure 36
-
-
-
-
-
-
-
-
-
N/A
-
20
21
22
23
24
25
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
24-bit MSB justified
24-bit I2S Compatible
24-bit LSB justified
32-bit LSB justified
32-bit MSB justified
32-bit I2S Compatible
H/L 512fs
L/H 512fs
H/L 512fs
H/L 512fs
H/L 512fs
L/H 512fs
Figure 38
Figure 39
Figure 40
Figure 38
Figure 38
Figure 39
Note 49. BICK more than setting bit must be input to each channel. In the LRCK column, “H/L” indicates
that L channel data can be input when LRCK is “H” and R channel data can be input when LRCK
is “L”. “L/H” indicates L channel data can be input when LRCK is “L” and R channel data can be
input when LRCK is “H”.
Note 50. The default settings in Register Control Mode are shown below.
TDM1 bit = “0”, TDM0 bit = “0”, DIF2 bit = “1”, DIF1 bit = “1”, DIF0 bit = “0”
016011073-E-00
2016/12
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