ASAHI KASEI
[AK4122]
LRCK
0
1
2
20 21 22 23 24
31 0
1
2
20 21 22 23 24
31 0 1
BICK(64fs)
SDTI(i)
23 22
4
3
2
1
0
Don't Care 23 22
4
3
2
1
0
Don't Care 23
23:MSB, 0:LSB
Lch Data
Rch Data
Figure 3. Mode 1 Timing
LRCK
0
1
2
3
21 22 23 24 25
0
1
2
21 22 23 24 25
0
1
BICK(64fs)
SDTI(i)
23 22
4
3
2
1
0
Don't Care 23 22
4
3
2
1
0
Don't Care
23:MSB, 0:LSB
Lch Data
Rch Data
Figure 4. Mode 2 Timing
LRCK
0
1
2
8
9
24
31 0
1
2
8
9
24
31 0 1
BICK(64fs)
SDTI(i)
Don't Care 23
23:MSB, 0:LSB
8
1
0
Don't Care 23
8
1 0
Lch Data
Rch Data
Figure 5. Mode 3 Timing
(2) PORT2
Four kinds of data formats can be chosen with the IDIF1-0 bits (Table 9). In all modes, the serial data is in MSB first, 2’s
compliment format. If PORT2 is selected the output port, the SDTIO is clocked out on the falling edge of BICK2, and if
PORT2 is selected the input port, the SDTIO is latched on the rising edge of BICK2. The audio interface supports both
master and slave modes. In master mode, BICK2 and LRCK2 are output with the BICK2 frequency fixed to 64fs and the
LRCK2 frequency fixed to 1fs.
Mode IDIF1
IDIF0
Output Format
Input Format
LRCK BICK
0
1
2
3
0
0
1
1
0
1
0
1
24bit, MSB justified
24bit, MSB justified
16bit, LSB justified
24bit, MSB justified
H/L
H/L
L/H
H/L
≥ 32fs
≥ 48fs
≥ 48fs
≥ 48fs
Default
24bit, I2S Compatible 24bit, I2S Compatible
24bit, MSB justified
24bit, LSB justified
Table 9. Audio Interface Format for PORT2
MS0267-E-02
2004/07
- 19 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
