ASAHI KASEI
[AK4122]
Soft Mute Operation
Soft mute operation is performed in the digital domain of the SRC output. Soft mute can be controlled by SMUTE bit or
SMUTE pin. The SMUTE bit and SMUTE pin are ORed between pin and register. When SMUTE bit goes “1” or
SMUTE pin goes “H”, the SRC output data is attenuated by −∞ within 1024 LRCK cycles. When the SMUTE bit returned
“0” and SMUTE pin goes “L” the mute is cancelled and the output attenuation gradually changes to 0dB during 1024
LRCK cycles. If the soft mute is cancelled before mute state after starting of the operation, the attenuation is discontinued
and returned to 0dB by the same cycles. The soft mute is effective for changing the signal source.
SMUTE
(1)
DATT Level
(3)
Attenuation
-∞
GD
GD
(2)
SDTIO / SDTO
Figure 12. Soft Mute Function
(1) The output data is attenuated by −∞ during 1024 LRCK cycles (1024/fs).
(2) Digital output delay from the digital input is called the group delay (GD).
(3) If the soft mute is cancelled before attenuating to −∞ after starting the operation, the attenuation is discontinued and
returned to 0dB by the same number of clock cycles.
MS0267-E-02
2004/07
- 22 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
