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T9000 参数 Datasheet PDF下载

T9000图片预览
型号: T9000
PDF下载: 下载PDF文件 查看货源
内容描述: ISDN网络终端节点( NTN )设备 [ISDN Network Termination Node (NTN) Device]
分类和应用: 综合业务数字网
文件页数/大小: 126 页 / 1581 K
品牌: AGERE [ AGERE SYSTEMS ]
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T9000  
Preliminary Data Sheet  
November 2000  
ISDN Network Termination Node (NTN) Device  
9 HDLC with FIFO Module (continued)  
9.5 HDLC Register Set (continued)  
Table 68. HTM1: HDLC TEI Match Pattern 1 (0x25)  
Reg  
R/W  
Bit 7  
TEI16  
Bit 6  
TEI15  
Bit 5  
TEI14  
Bit 4  
TEI13  
Bit 3  
TEI12  
Bit 2  
TEI11  
Bit 1  
TEI10  
Bit 0  
EA11  
HTM1  
R/W  
RESET Default  
Bit # Symbol  
Name/Description  
7—1 TEI1[6:0] Match Pattern 1 for TEI. See Section 9.4, Address Recognition for details.  
0
EA11 Address Field Extension Bit (0 or 1). This bit has to be 1 for recognizing the special TEI value  
of 127.  
Table 69. HSM2: HDLC SAPI Match Pattern 2 (0x26)  
Reg  
R/W  
Bit 7  
SAPI25  
Bit 6  
SAPI24  
Bit 5  
SAPI23  
Bit 4  
SAPI22  
Bit 3  
SAPI21  
Bit 2  
SAPI20  
Bit 1  
C/R2  
Bit 0  
EA02  
HSM2  
R/W  
RESET Default  
Bit #  
Symbol  
Name/Description  
7—2  
SAPI2[5:0]  
Match Pattern 2 for SAPI. When in the HDLC mode, this register provides the match  
pattern for SAPI. See Section 9.4, Address Recognition for details.  
1
0
C/R2  
EA02  
Command/Response Bit. Set according to the Q.920 standard.  
Address Field Extension Bit (0 or 1). This bit has to be 0 for recognizing special SAPI  
values of 0 or 63.  
Table 70. HTM2: HDLC TEI Match Pattern 2 (0x27)  
Reg  
R/W  
Bit 7  
TEI26  
Bit 6  
TEI25  
Bit 5  
TEI24  
Bit 4  
TEI23  
Bit 3  
TEI22  
Bit 2  
TEI21  
Bit 1  
TEI20  
Bit 0  
EA12  
HTM2  
R/W  
RESET Default  
Bit # Symbol  
Name/Description  
7—1 TEI2[6:0] Match Pattern 2 for TEI. See Section 9.4, Address Recognition for details.  
EA12 Address Field Extension Bit (0 or 1). This bit has to be 1 for recognizing the special TEI  
value of 127.  
0
Table 71. HSM3: HDLC SAPI Match Pattern 3 (0x28)  
Reg  
R/W  
Bit 7  
SAPI35  
Bit 6  
SAPI34  
Bit 5  
SAPI33  
Bit 4  
SAPI32  
Bit 3  
SAPI31  
Bit 2  
SAPI30  
Bit 1  
C/R3  
Bit 0  
EA03  
HSM3  
R/W  
RESET Default  
Bit #  
Symbol  
Name/Description  
7—2  
SAPI3[5:0]  
Match Pattern 3 for SAPI. When in the HDLC mode, this register provides the match  
pattern for SAPI. See Section 9.4, Address Recognition for details.  
1
0
C/R3  
EA03  
Command/Response Bit. Set according to the Q.920 standard.  
Address Field Extension Bit (0 or 1). This bit has to be 0 for recognizing special SAPI  
values of 0 or 63.  
64  
Lucent Technologies Inc.  
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