Ambassador T8100A, T8102, and T8105
H.100/H.110 Interfaces and Time-Slot Interchangers
Advance Data Sheet
November 1999
2 Architecture and Functional Description (continued)
2.2 Local Bus Section
Figure 4 shows the local bus section function diagram.
Note: Routing and MUXing for the H-bus section is included since the H-bus requires access to the converters
for local bus-to-H-bus or H-bus-to-local bus transfers (the H-bus is discussed in Section 2.3 H-Bus Sec-
tion).
XCS is a pseudo serial stream, read out from the connection memory on each memory access. It is read out
directly, i.e., not passing through any parallel/serial converters or holding registers, so it precedes the connection
associated with it by one time slot.
FROM CAM
TO CAM
CAM-
LOCAL
SELECT
PARALLEL
TO
SERIAL
(P/S)
8
S/P
BYPASS
8
8
SERIAL
TO
PARALLEL
(S/P)
LOCAL STREAM
INPUTS
DATA BUFFER-
REGISTER
8
8
P/S
BYPASS
LOCAL STREAM
OUTPUTS
11
11
(1024 LOCATIONS
x BITS) x 2
DATA
ADDRESS
BUFFER &
DECODER
10
MEMORY
INTERNAL
DATA BUS
(PATTERN MODE)
CTL BITS
INTERNAL (AMR) + (LAR)
ADDRESS
BUS
CONNECTION
BUFFER-
REGISTER
XCS
EACH LOCATION:
STREAM = 4 bits
TIME SLOT = 7 bits
TIME-SLOT ENABLE BIT
CONSTANT/MIN DELAY BIT
PATTERN MODE BIT
XCS BIT
1024 LOCATIONS
x 15 bits
CONNECTION
MEMORY
ADDRESS
BUFFER &
DECODER
11
10
5-6102F
Figure 4. Local Bus Section Function
All of the Ambassador family TSIs have a local bus, but only the T8100A and T8105 have local connection memory
and local data memory for time-slot interchanging.
Lucent Technologies Inc.
23
AGERE [ AGERE SYSTEMS ]
