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T8102A 参数 Datasheet PDF下载

T8102A图片预览
型号: T8102A
PDF下载: 下载PDF文件 查看货源
内容描述: H.100 / H.110接口和时隙交换 [H.100/H.110 Interface and Time-Slot Interchangers]
分类和应用:
文件页数/大小: 112 页 / 1382 K
品牌: AGERE [ AGERE SYSTEMS ]
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Ambassador T8100A, T8102, and T8105  
H.100/H.110 Interfaces and Time-Slot Interchangers  
Advance Data Sheet  
November 1999  
1 Product Overview (continued)  
1.3 Pin Information (continued)  
Table 2. Pin Descriptions: Local Streams Pins  
Symbol  
Pin  
Ball  
Type  
Name/Description  
LDI[15:8]  
LDI[7:0]  
201—194  
192—185  
A3, B4, C5, D6, A4, B5, C6, A5  
B6, A6, C7, D7, B7, A7, C8, B8  
I
Local Data Input Streams. 50 kinter-  
nal pull-up.  
LDO[15:12] 182—179  
LDO[11:8] 177—174  
C9, A9, B9, A10  
B10, A11, C10, B11  
D11, C11, B12, A13  
B13, A14, C13, D12  
O
Local Data Output Streams. 8 mA  
drive, 3-state.  
LDO[7:4]  
LDO[3:0]  
172—169  
167—164  
Table 3. Pin Descriptions: H-Bus Pins  
Symbol  
Pin  
Ball  
Type  
Name/Description  
CT_D[31:28]  
CT_D[27:24]  
CT_D[23:20]  
CT_D[19:16]  
CT_D[15:12]  
CT_D[11:10]  
CT_D[9:8]  
162—159 A15, D13, C14, B15  
157—154 A17, C16, D15, E14  
152—149 C17, D16, E15, F14  
147—144 D17, E16, F15, E17  
142—139 F16, F17, G15, G14  
I/O  
H-Bus, Data Lines. Variable rate 2 Mbits/s,  
4 Mbits/s, 8 Mbits/s. 5 V tolerant, PCI compliant,  
50 kinternal pull-up.  
137—136  
134—133  
G16, G17  
H15, H16  
CT_D[7:4]  
131—128 H17, J15, J17, J16  
CT_D[3:2]  
CT_D[1:0]  
126—125  
123—122  
K17, K16  
L17, K15  
/CT_FRAME_A  
/CT_FRAME_B  
/FR_COMP  
CT_NETREF1  
CT_NETREF2  
CT_C8_A  
120  
114  
115  
116  
113  
118  
112  
205  
L14  
P17  
M15  
N17  
N15  
M16  
M14  
B3  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I
H-Bus, 8 kHz, Frame. 5 V tolerant, PCI compliant,  
24 mA drive, Schmitt in. No pull-up.  
H-Bus, Alternate 8 kHz Frame. 5 V tolerant, PCI  
compliant, 24 mA drive. Schmitt in. No pull-up.  
H-Bus, Compatibility Frame Signal. 24 mA drive,  
Schmitt in, 50 kinternal pull-up.  
H-Bus, Network Reference 1. 8 kHz, 2.048 MHz,  
or 1.544 MHz. PCI driver. Not internally pulled up.  
H-Bus, Network Reference 2. 8 kHz, 2.048 MHz,  
or 1.544 MHz. PCI driver. Not internally pulled up.  
H-Bus, Main Clock. 5 V tolerant, PCI compliant,  
24 mA drive, Schmitt in. No pull-up.  
CT_C8_B  
H-Bus, Alternate Main Clock. 5 V tolerant, PCI  
compliant, 24 mA drive, Schmitt in. No pull-up.  
LPUE  
Local Pull-Up Enable. A low disables all pull-ups  
other than the CT_Dxx lines and the legacy clocks  
C2, /C4, /C16+, /C16–, SCLK, SCLKX2, and  
/FR_COMP. 50 kinternal pull-up. See Section  
3.3.5 Physical Connections for H.110.  
DPUE  
4
D3  
I
Data Pull-Up Enable. High enables pull-ups on  
CT_Dxx only for H.100, low disables for H.110.  
50 kinternal pull-up.  
Lucent Technologies Inc.  
9
 
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