Data Sheet
June 1999
ORCA Series 3C and 3T FPGAs
Timing Characteristics (continued)
Table 64. Slave Serial Configuration Mode Timing Characteristics
<
<
<
<
+85 °C.
DD
A
DD
A
OR3Cxx Commercial: V
= 5.0 V ± 5%, 0 °C
T
70 °C; Industrial: V
= 5.0 V ± 10%, –40 °C
T
DD = 3.0 V to 3.6 V, 0 °C < TA < 70 °C; Industrial: VDD = 3.0 V to 3.6 V, –40 °C < TA < +85 °C.
OR3Txxx Commercial: V
Parameter
Symbol
Min
Max
Unit
S
DIN Setup Time:
3Cxx
T
20.00
10.50
—
—
ns
ns
3Txxx
H
DIN Hold Time
T
0.00
—
ns
CH
CCLK High Time:
3Cxx
T
20.00
7.00
—
—
ns
ns
3Txxx
CL
T
CCLK Low Time:
3Cxx
20.00
7.00
—
—
ns
ns
3Txxx
C
CCLK Frequency:
3Cxx
F
—
—
25.00
66.00
MHz
MHz
3Txxx
D
CCLK to DOUT
T
—
20.00
ns
Note: Serial configuration data is transmitted out on DOUT on the falling edge of CCLK after it is input on DIN.
BIT N
DIN
TS
TH
CCLK
DOUT
TCL
TCH
TD
BIT N
5-4535(F).
Figure 86. Slave Serial Configuration Mode Timing Diagram
Lucent Technologies Inc.
139
AGERE [ AGERE SYSTEMS ]
