欢迎访问ic37.com |
会员登录 免费注册
发布采购

EVAL-AD5940BIOZ 参数 Datasheet PDF下载

EVAL-AD5940BIOZ图片预览
型号: EVAL-AD5940BIOZ
PDF下载: 下载PDF文件 查看货源
内容描述: [High Precision, Impedance, and Electrochemical Front End]
分类和应用:
文件页数/大小: 130 页 / 1952 K
品牌: ADI [ ADI ]
 浏览型号EVAL-AD5940BIOZ的Datasheet PDF文件第62页浏览型号EVAL-AD5940BIOZ的Datasheet PDF文件第63页浏览型号EVAL-AD5940BIOZ的Datasheet PDF文件第64页浏览型号EVAL-AD5940BIOZ的Datasheet PDF文件第65页浏览型号EVAL-AD5940BIOZ的Datasheet PDF文件第67页浏览型号EVAL-AD5940BIOZ的Datasheet PDF文件第68页浏览型号EVAL-AD5940BIOZ的Datasheet PDF文件第69页浏览型号EVAL-AD5940BIOZ的Datasheet PDF文件第70页  
AD5940  
Data Sheet  
ADC Maximum Hysteresis Value Register—ADCMAXSMEN  
Address 0x000020B4, Reset: 0x00000000, Name: ADCMAXSMEN  
Table 75. Bit Descriptions for ADCMAXSMEN Register  
Bits  
[31:16] Reserved  
[15:0] MAXSWEN  
Bit Name  
Settings Description  
Reset Access  
Reserved.  
0x0  
0x0  
R
ADCMAX hysteresis value. If a value greater than the value of the ADCMAX register is  
R/W  
measured by the ADC, the FLAG5 bit in INTCFLAG0 register or INTCFLAG1 register is set.  
The FLAG5 bit remains set until the value of the ADCDAT register is less than the value  
of ADCMAX, Bits[15:0] – ADCMAXSMEN, Bits[15:0].  
ADC Delta Value Check Register—ADCDELTA  
Address 0x000020B8, Reset: 0x00000000, Name: ADCDELTA  
Table 76. Bit Descriptions for ADCDELTA Register  
Bits  
[31:16] Reserved  
[15:0] DELTAVAL  
Bit Name Settings Description  
Reset Access  
Reserved.  
0x0  
R
ADCDAT code differences limit option. If two consecutive ADCDAT register results have 0x0  
a difference greater than ADCDELTA, Bits[15:0], an error flag is set via the FLAG6 bit of  
the INTCFLAG0 register or INTCFLAG1 register.  
R/W  
ADC STATISTICS REGISTERS  
Table 77. ADC Statistics Registers Summary  
Address  
Name  
Description  
Reset  
Access  
0x000021C0 STATSVAR  
0x000021C4 STATSCON  
Variance output register  
Statistics controlmodule configuration register, including mean, variance, and outlier  
detection blocks  
0x00000000  
0x00000000 R/W  
R
0x000021C8 STATSMEAN Mean output register  
0x00000000  
R
Variance Output Register—STATSVAR  
Address 0x000021C0, Reset: 0x00000000, Name: STATSVAR  
Table 78. Bit Descriptions for STATSVAR  
Bits  
Bit Name  
Settings  
Description  
Reset Access  
31  
Reserved  
Reserved.  
0x0  
0x0  
R
R
[30:0] Variance  
Statistical variance value. This value indicates the spread from the mean value.  
Statistics Control Register—STATSCON  
Address 0x000021C4, Reset: 0x00000000, Name: STATSCON  
Table 79. Bit Descriptions for STATSCON Register  
Bits  
Bit Name  
Settings Description  
Reset Access  
[31:12] Reserved  
Reserved.  
0x0  
0x0  
0x0  
R
[11:7]  
[6:4]  
STDDEV  
Standard deviation configuration.  
R/W  
R/W  
SAMPLENUM  
Sample size. These bits set the number of ADC samples used for each statistic  
calculation.  
0
1
128 samples.  
64 samples.  
10 32 samples.  
11 16 samples.  
100 8 samples.  
Reserved.  
[3:1]  
0
Reserved  
STATSEN  
0x0  
0x0  
R/W  
R/W  
Statistics enable.  
0
1
Disable statistics.  
Enable statistics.  
Rev. 0 | Page 66 of 130  
 
 复制成功!