AD5940
Data Sheet
D2
D3
EXCITATION BUFFER
AMPLIFIER LOOP
D4
Dx/DR0 SWITCHES
CE0
D5
N
P
AFE1
D6
D7
DSWFULLCON
OR SWCON[3:0]
D8
DR0
RCAL0
RCAL1
PL
PR0
P2
P3
P4
P5
P6
P7
Px/Pxx SWITCHES
PSWFULLCON
OR SWCON[7:4]
RE0
AFE2
SE0
DE0
P8
P9
AFE3
P11
P12
PL2
DVDD_REG_AD
NL2
NR1
N1
N2
N3
N4
N5
N6
N7
R
LOAD_SE0
Nx/Nxx SWITCHES
NSWFULLCON
OR SWCON[11:8]
R
LOAD_AFE3
N9
NL
TR1
T1
T2
T3
T4
T5
T6
T7
TSWFULLCON
OR SWCON[15:12]
HIGH SPEED
TRANSIMPEDANCE
AMPLIFIER
Tx/TR1 SWITCHES
+
TIA OUTPUT
HSRTIACON[3:0]
–
R
TIA
AIN0
AIN1
AIN2
AIN3
T9
HSRTIACON[12:5]
C
TIA
T10
HSRTIACON[4]
R
TIA_DE0
R
LOAD_DE0
DE0RTIACON[7:0]
SWITCH AND RELOAD
CONTROLLED BY
DE0RESCON[7:0]
Figure 33. Switch Matrix Block Diagram—Switches Connecting to the High Speed DAC and High Speed TIA
Rev. 0 | Page 70 of 130
ADI [ ADI ]
