ADV7390/ADV7391/ADV7392/ADV7393
REGISTER MAP
A microprocessor can read from or write to all registers of the
ADV739x via the MPU port, except for registers that are
specified as read-only or write-only registers.
REGISTER PROGRAMMING
Table 13 to Table 27 describe the functionality of each register.
All registers can be read from as well as written to, unless
otherwise stated.
The subaddress register determines the register accessed by the
next read or write operation. All communication through the
MPU port starts with an access to the subaddress register. A
read/write operation is then performed from/to the target
address, incrementing to the next address until the transaction
is complete.
SUBADDRESS REGISTER (SR7 TO SR0)
The subaddress register is an 8-bit write-only register. After the
MPU port is accessed and a read/write operation is selected, the
subaddress is set up. The subaddress register determines which
register performs the next operation.
Table 13. Register 0x00
SR7 to
Bit Number
Register
Setting
Reset
Value
0x12
SR0
Register
Bit Description
7
6
5
4
3
2
1
0
0x00
Power
Mode
Register
Sleep Mode. With this control enabled, the current consumption is
reduced to μA level. All DACs and the internal PLL circuit are
disabled. Registers can be read from and written to in sleep mode.
0
Sleep
mode off.
Sleep
1
mode on.
PLL and Oversampling Control. This control allows the internal PLL
circuit to be powered down and the oversampling to be switched off.
0
1
PLL on.
PLL off.
DAC 3: Power on/off.
DAC 2: Power on/off.
DAC 1: Power on/off.
Reserved.
0
1
DAC 3 off.
DAC 3 on.
DAC 2 off.
DAC 2 on.
DAC 1 off.
DAC 1 on.
0
1
0
1
0
0
0
Rev. 0 | Page 25 of 96
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