ADV7180
Data Sheet
Pin No.
38
39
40
51
Mnemonic
VREFP
VREFN
AVDD
Type Description
O
O
P
I
Internal Voltage Reference Output. See Figure 56 for recommended output circuitry.
Internal Voltage Reference Output. See Figure 56 for recommended output circuitry.
Analog Supply Voltage (1.8 V).
System Reset Input. Active low. A minimum low reset pulse width of 5 ms is required to reset
the ADV7180 circuitry.
RESET
52
ALSB
I
This pin selects the I2C address for the ADV7180. For ALSB set to Logic 0, the address selected
for a write is 0x40; for ALSB set to Logic 1, the address selected is 0x42.
53
54
63
64
SDATA
SCLK
FIELD
VS
I/O
I
O
O
I2C Port Serial Data Input/Output Pin.
I2C Port Serial Clock Input. The maximum clock rate is 400 kHz.
Field Synchronization Output Signal.
Vertical Synchronization Output Signal.
Rev. G | Page 16 of 120
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