Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
41.78MHz
The serial communication adopts an asynchronous protocol,
which supports various word lengths, stop bits, and parity
generation options selectable in the configuration register.
BaudRate =
128
23 ×16×8×2×
2048
Baud Rate Generation
where:
Baud Rate = 19,200 bps
There are two ways of generating the UART baud rate, normal
450 UART baud rate generation and the fractional divider.
Error = 0%, compared to 6.25% with the normal baud rate
generator.
Normal 450 UART Baud Rate Generation
UART Register Definitions
The baud rate is a divided version of the core clock using the values
in the COMDIV0 and COMDIV1 MMRs (16-bit value, DL).
The UART interface consists of 12 registers: COMTX, COMRX,
COMDIV0, COMIEN0, COMDIV1, COMIID0, COMCON0,
COMCON1, COMSTA0, COMSTA1, COMSCR, and
COMDIV2.
41.78MHz
Baud Rate =
2CD - 16 × 2 × DL
Table 93 gives some common baud rate values.
Table 94. COMTX Register
Table 93. Baud Rate Using the Normal Baud Rate Generator
Name
Address
Default Value
Access
Baud Rate
CD
DL
Actual Baud Rate
% Error
COMTX
0xFFFF0700
0x00
R/W
9600
0
0
0
3
3
3
0x88
0x44
0x0B
0x11
0x08
0x01
9600
19,200
118,691
9600
20,400
0
0
3
0
COMTX is an 8-bit transmit register.
19,200
115,200
9600
19,200
115,200
Table 95. COMRX Register
Name
Address
Default Value
Access
6.25
41.67
COMRX
0xFFFF0700
0x00
R
163,200
COMRX is an 8-bit receive register.
Fractional Divider
Table 96. COMDIV0 Register
The fractional divider, combined with the normal baud rate
generator, produces a wider range of more accurate baud rates.
Name
Address
Default Value
Access
COMDIV0
0xFFFF0700
0x00
R/W
FBEN
CORE
CLOCK
/2
COMDIV0 is a low byte divisor latch. COMTX, COMRX,
and COMDIV0 share the same address location. COMTX
and COMRX can be accessed when Bit 7 in the COMCON0
register is cleared. COMDIV0 can be accessed when Bit 7
of COMCON0 is set.
/16DL
UART
/(M+N/2048)
Figure 75. Baud Rate Generation Options
Calculation of the baud rate using fractional divider is as follows:
Table 97. COMIEN0 Register
41.78 MHz
Baud Rate =
Name
Address
Default Value
Access
N
2048
2
CD ×16×DL×2× M +
COMIEN0
0xFFFF0704
0x00
R/W
COMIEN0 is the interrupt enable register.
41.78MHz
N
M+
=
2048 Baud Rate × 2CD × 16 ×DL×2
Table 98. COMIEN0 MMR Bit Descriptions
Bit
7:4
3
Name
Description
For example, generation of 19,200 baud with CD bits = 3
(Table 93 gives DL = 0x08) is
N/A
EDSSI
Reserved.
Modem status interrupt enable bit. Set by
user to enable generation of an interrupt if
any of COMSTA1[3:1] is set. Cleared by user.
Rx status interrupt enable bit. Set by user to
enable generation of an interrupt if any of
COMSTA0[4:1] is set. Cleared by user.
Enable transmit buffer empty interrupt. Set
by user to enable interrupt when buffer is
empty during a transmission. Cleared by user.
Enable receive buffer full interrupt. Set by
user to enable interrupt when buffer is full
during a reception. Cleared by user.
41.78 MHz
N
M +
M +
=
2048 19200 ×23 ×16×8×2
2
1
0
ELSI
N
=1.06
2048
ETBEI
ERBFI
where:
M = 1
N = 0.06 × 2048 = 128
Rev. F | Page 71 of 104
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