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ADSP-BF561SBB500 参数 Datasheet PDF下载

ADSP-BF561SBB500图片预览
型号: ADSP-BF561SBB500
PDF下载: 下载PDF文件 查看货源
内容描述: Blackfin嵌入式对称多处理器 [Blackfin Embedded Symmetric Multiprocessor]
分类和应用:
文件页数/大小: 64 页 / 2516 K
品牌: AD [ ANALOG DEVICES ]
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ADSP-BF561
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the Blackfin processor family. Third
party software tools include DSP libraries, real-time operating
systems, and block diagram design tools.
RELATED DOCUMENTS
The following publications that describe the ADSP-BF561 pro­
cessors (and related processors) can be ordered from any
Analog Devices sales office or accessed electronically on our
website:
Getting Started With Blackfin Processors
ADSP-BF561 Blackfin Processor Hardware Reference
ADSP-BF53x/BF56x Blackfin Processor Programming
Reference
• ADSP-BF561
Blackfin Processor Anomaly List
EZ-KIT Lite Evaluation Board
For evaluation of ADSP-BF561 processors, use the
ADSP-BF561 EZ-KIT Lite
®
board available from Analog
Devices. Order part number ADDS-BF561-EZLITE. The board
comes with on-chip emulation capabilities and is equipped to
enable software development. Multiple daughter cards are
available.
DESIGNING AN EMULATOR-COMPATIBLE
PROCESSOR BOARD
The Analog Devices family of emulators are tools that every sys­
tem developer needs to test and debug hardware and software
systems. Analog Devices has supplied an IEEE 1149.1 JTAG
Test Access Port (TAP) on the ADSP-BF561. The emulator uses
the TAP to access the internal features of the processor, allow­
ing the developer to load code, set breakpoints, observe
variables, observe memory, and examine registers. The proces­
sor must be halted to send data and commands, but once an
operation has been completed by the emulator, the processor is
set running at full speed with no impact on system timing.
To use these emulators, the target board must include a header
that connects the processor’s JTAG port to the emulator.
For details on target board design issues, including mechanical
layout, single processor connections, multiprocessor scan
chains, signal buffering, signal termination, and emulator pod
logic, see
Analog Devices JTAG Emulation Technical Reference
(EE-68)
on the Analog Devices website (www.analog.com)—use
site search on “EE-68.” This document is updated regularly to
keep pace with improvements to emulator support.
Rev. E |
Page 16 of 64 |
September 2009