ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Table 12. Pin Descriptions (Continued)
Driver
Type2
Pin Name
I/O1 Function (First/Second/Third/Fourth)
Port B: GPIO/TWI1/UART2–3/SPI2/TMR0–3
PB0/SCL1
PB1/SDA1
I/O GPIO/TWI1 Serial Clock (Open-drain output: requires a pull-up resistor.) E
I/O GPIO/TWI1 Serial Data (Open-drain output: requires a pull-up resistor.) E
PB2/UART3RTS
PB3/UART3CTS
PB4/UART2TX
PB5/UART2RX/TACI2
PB6/UART3TX
PB7/UART3RX/TACI3
PB8/SPI2SS/TMR0
PB9/SPI2SEL1/TMR1
PB10 SPI2SEL2/TMR2
PB11/SPI2SEL3/TMR3/ HWAIT
PB12/SPI2SCK
PB13/SPI2MOSI
PB14/SPI2MISO
Port C: GPIO/SPORT0/SD Controller/MXVR (MOST)
PC0/TFS0
PC1/DT0SEC /MMCLK
PC2/DT0PRI
PC3/TSCLK0
PC4/RFS0
PC5/DR0SEC/MBCLK
PC6/DR0PRI
PC7/RSCLK0
PC8/SD_D0
PC9/SD_D1
PC10/SD_D2
I/O GPIO/UART3 Request to Send
I/O GPIO/UART3 Clear to Send
I/O GPIO/UART2 Transmit
I/O GPIO/UART2 Receive/Alternate Capture Input 2
I/O GPIO/UART3 Transmit
I/O GPIO/UART3 Receive/Alternate Capture Input 3
I/O GPIO/SPI2 Slave Select Input/Timer 0
I/O GPIO/SPI2 Slave Select Enable 1/Timer 1
I/O GPIO/SPI2 Slave Select Enable 2/Timer 2
I/O GPIO/SPI2 Slave Select Enable 3/Timer 3/Boot Host Wait
I/O GPIO/SPI2 Clock
C
A
A
A
A
A
A
A
A
A
A
C
C
I/O GPIO/SPI2 Master Out Slave In
I/O GPIO/SPI2 Master In Slave Out
I/O GPIO/SPORT0 Transmit Frame Sync
I/O GPIO/SPORT0 Transmit Data Secondary/MXVR Master Clock
I/O GPIO/SPORT0 Transmit Data Primary
I/O GPIO/SPORT0 Transmit Serial Clock
I/O GPIO/SPORT0 Receive Frame Sync
I/O GPIO/SPORT0 Receive Data Secondary/MXVR Bit Clock
I/O GPIO/SPORT0 Receive Data Primary
I/O GPIO/SPORT0 Receive Serial Clock
I/O GPIO/SD Data Bus
I/O GPIO/SD Data Bus
I/O GPIO/SD Data Bus
I/O GPIO/SD Data Bus
I/O GPIO/SD Clock Output
C
C
C
A
C
C
C
C
A
A
A
A
A
A
PC11/SD_D3
PC12/SD_CLK
PC13/SD_CMD
I/O GPIO/SD Command
Rev. C
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Page 27 of 100
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February 2010
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