ADM1026
Table 23. Register 0Ah, GPIO Configuration Register 3 (Power-On Default 00h)
Bit
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
0
GPIO8 Direction
GPIO8 Polarity
GPIO9 Direction
GPIO9 Polarity
GPIO±0 Direction
GPIO±0 Polarity
GPIO±± Direction
GPIO±± Polarity
When this bit is 0, GPIO8 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO8 is active low; otherwise, it is active high.
When this bit is 0, GPIO9 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO9 is active low; otherwise, it is active high.
When this bit is 0, GPIO±0 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO±0 is active low; otherwise, it is active high.
When this bit is 0, GPIO±± is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO±± is active low; otherwise, it is active high.
±
2
3
4
5
6
7
Table 24. Register 0Bh, GPIO Configuration Register 4 (Power-On Default 00h)
Bit
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
0
GPIO±2 Direction
GPIO±2 Polarity
GPIO±3 Direction
GPIO±3 Polarity
GPIO±4 Direction
GPIO±4 Polarity
GPIO±5 Direction
GPIO±5 Polarity
When this bit is 0, GPIO±2 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO±2 is active low; otherwise, it is active high.
When this bit is 0, GPIO±3 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO±3 is active low; otherwise, it is active high.
When this bit is 0, GPIO±4 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO±4 is active low; otherwise, it is active high.
When this bit is 0, GPIO±5 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO±5 is active low; otherwise, it is active high.
±
2
3
4
5
6
7
Table 25. Register 0ch, EEPROM Register 2 (Power-On Default 00h)
Bit
Name
R/W
Description
7–0 Factory Use
R
For factory use only. Do not write to this register.
Table 26. Register 0Dh, Internal Temperature
Limit (Power-On Default, 37h 55°C)
THERM
Bit
Name
R/W
Description
7–0 Int Temp THERM Limit R/W
This register contains the THERM limit for the internal temperature channel. Exceeding this limit
causes the THERM output pin to be asserted.
Table 27. Register 0Eh, TDM1
Limit (Power-On Default 50h, 80°C)
Description
THERM
R/W
Bit
Name
7–0 TDM± THERM Limit
R/W
This register contains the THERM limit for the TDM± temperature channel. Exceeding this limit
causes the THERM output pin to be asserted.
Table 28. Register 0Fh, TDM2
Limit (Power-On Default 50h, 80°C)
Description
THERM
R/W
Bit
Name
7–0 TDM2 THERM Limit
R/W
This register contains the THERM limit for the TDM2 temperature channel. Exceeding this limit
causes the THERM output pin to be asserted.
Table 29. Register 10h, Internal Temperature TMIN (Power-On Default 28h, 40°C)
Bit
Name
R/W
Description
7–0
Internal Temp TMIN
R/W
This register contains the TMIN value for automatic fan speed control based on the internal
temperature channel.
Table 30. Register 11h, TDM1 Temperature TMIN (Power-On Default 40h, 64°C)
Bit
Name
R/W
Description
7–0
TDM± Temp TMIN
R/W
This register contains the TMIN value for automatic fan speed control based on the TDM±
temperature channel.
Rev. A | Page 4± of 56
ADI [ ADI ]
