ADM1026
Table 18. Register 05h, PWM Control Register (Power-On Default FFh)
Bit
Name
R/W
Description
7–4
PWM Control
R/W
This register contains the value to which the PWM fan speed is programmed in normal
mode, or the 4 MSBs contain the minimum fan speed in auto fan speed control mode.
0000 = 0% Duty Cycle
000± = 7% Duty Cycle
0±0± = 33% Duty Cycle
0±±0 = 40% Duty Cycle
0±±± = 47% Duty Cycle
±±±0 = 93% Duty Cycle
±±±± = ±00% Duty Cycle
Undefined
3–0
Unused
R
Table 19. Register 06h, EEPROM Register 1 (Power-On Default 00h)
Bit
Name
R/W
Description
7–0
Factory Use
R/W
For factory use only. Do not write to this register.
Table 20. Register 07h, Configuration Register 3 (Power-On Default 00h)
Bit
Name
R/W
Description
0
Enable GPIO±6/ THERM = 0
R/W
When this bit is ±, Pin 42 is enabled as a general-purpose I/O pin (GPIO±6); otherwise it
is the THERM output.
±
CI Clear = 0
R/W
R/W
R
R/W
R/W
Writing a ± to this bit clears the CI latch. This bit is cleared by writing a 0 to it.
When this bit is 0, VREF (Pin 24) outputs ±.82 V, otherwise, it outputs 2.5 V.
Undefined, reads back 0.
When this bit is 0, GPIO±6 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO±6 is active low; otherwise, it is active high.
2
VREF Select = 0
Unused
GPIO±6 Direction
GPIO±6 Polarity
5–3
6
7
Table 21. Register 08h, GPIO Configuration Register 1 (Power-On Default 00h)
Bit
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
0
GPIO0 Direction
GPIO0 Polarity
GPIO± Direction
GPIO± Polarity
GPIO2 Direction
GPIO2 Polarity
GPIO3 Direction
GPIO3 Polarity
When this bit is 0, GPIO0 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO0 is active low; otherwise it is active high.
When this bit is 0, GPIO± is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO± is active low; otherwise it is active high.
When this bit is 0, GPIO2 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO2 is active low; otherwise, it is active high.
When this bit is 0, GPIO3 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO3 is active low; otherwise, it is active high.
±
2
3
4
5
6
7
Table 22. Register 09h, GPIO Configuration Register 2 (Power-On Default 00h)
Bit
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
0
GPIO4 Direction
GPIO4 Polarity
GPIO5 Direction
GPIO5 Polarity
GPIO6 Direction
GPIO6 Polarity
GPIO7 Direction
GPIO7 Polarity
When this bit is 0, GPIO4 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO4 is active low; otherwise, it is active high.
When this bit is 0, GPIO5 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO5 is active low; otherwise, it is active high.
When this bit is 0, GPIO6 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO6 is active low; otherwise, it is active high.
When this bit is 0, GPIO7 is configured as an input; otherwise, it is an output.
When this bit is 0, GPIO7 is active low; otherwise, it is active high.
±
2
3
4
5
6
7
Rev. A | Page 40 of 56
ADI [ ADI ]
