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    AD9513BCPZ-REEL7 参数 Datasheet PDF下载

    AD9513BCPZ-REEL7图片预览
    型号： AD9513BCPZ-REEL7
    PDF下载： 下载PDF文件 查看货源
    内容描述： 800 MHz的时钟分配IC ，分频器，延迟调整，三路输出 [800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs]
    分类和应用： 时钟驱动器逻辑集成电路
    文件页数/大小： 28 页 / 608 K
    品牌： AD [ ANALOG DEVICES ]
     浏览型号AD9513BCPZ-REEL7的Datasheet PDF文件第1页浏览型号AD9513BCPZ-REEL7的Datasheet PDF文件第3页浏览型号AD9513BCPZ-REEL7的Datasheet PDF文件第4页浏览型号AD9513BCPZ-REEL7的Datasheet PDF文件第5页浏览型号AD9513BCPZ-REEL7的Datasheet PDF文件第6页浏览型号AD9513BCPZ-REEL7的Datasheet PDF文件第7页浏览型号AD9513BCPZ-REEL7的Datasheet PDF文件第8页浏览型号AD9513BCPZ-REEL7的Datasheet PDF文件第9页  
    AD9513
    TABLE OF CONTENTS
    Features .............................................................................................. 1
    Applications....................................................................................... 1
    Functional Block Diagram .............................................................. 1
    General Description ......................................................................... 1
    Specifications..................................................................................... 3
    Clock Input.................................................................................... 3
    Clock Outputs ............................................................................... 3
    Timing Characteristics ................................................................ 4
    Clock Output Phase Noise .......................................................... 6
    Clock Output Additive Time Jitter............................................. 8
    SYNCB, VREF, and Setup Pins ................................................... 9
    Power.............................................................................................. 9
    Timing Diagrams............................................................................ 10
    Absolute Maximum Ratings.......................................................... 11
    Thermal Characteristics ............................................................ 11
    ESD Caution................................................................................ 11
    Pin Configuration and Function Descriptions........................... 12
    Terminology .................................................................................... 13
    Typical Performance Characteristics ........................................... 14
    Functional Description .................................................................. 17
    Overall.......................................................................................... 17
    CLK, CLKB—Differential Clock Input ................................... 17
    Synchronization.......................................................................... 17
    Power-On SYNC .................................................................... 17
    SYNCB..................................................................................... 17
    RSET Resistor ............................................................................. 18
    VREF............................................................................................ 18
    Setup Configuration................................................................... 18
    Divider Phase Offset .................................................................. 20
    Delay Block ................................................................................. 21
    Outputs ........................................................................................ 21
    Power Supply............................................................................... 22
    Exposed Metal Paddle ........................................................... 22
    Power Management ................................................................... 22
    Applications..................................................................................... 23
    Using the AD9513 Outputs for ADC Clock Applications.... 23
    LVDS Clock Distribution .......................................................... 23
    CMOS Clock Distribution ........................................................ 23
    Setup Pins (S0 to S10)................................................................ 24
    Power and Grounding Considerations and Power Supply
    Rejection...................................................................................... 24
    Phase Noise and Jitter Measurement Setups........................... 25
    Outline Dimensions ....................................................................... 26
    Ordering Guide .......................................................................... 26
    REVISION HISTORY
    9/05—Revision 0: Initial Version
    Rev. 0 | Page 2 of 28

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