ACT88430QJ-T
Rev 1.0, 24-Oct-2018
sequencing capability by allowing the 3.3V bus to be
used as the input to the other supplies and still be
properly sequenced to the downstream load.
PG
The PG pin shows the status of a regulator’s Power
Good / UV comparator. When the regulator is below the
Power Good threshold, the PG pin is pulled low. When
above the threshold, the PG pin is open drain. The PG
functionality is enabled by default, but can be disabled
by I2C. PG can be disabled by using the appropriate
regulator’s UV_FLTMSK bit. Table 2 shows the possible
regulators that can drive the PG pin.
Tie MODE to AGND to configure Buck1 for a switching
power supply. Tie MODE to VIN to configure Buck1 as
a bypass switch. MODE is only sampled when VIN
reaches its UVLO threshold. Changing the MODE pin
after startup has no effect. When Buck1 is configured as
a power supply, EXT_EN is a direct output of the
ACT88430 Buck1 enable signal. When Buck1 is config-
ured as a bypass switch, EXT_EN is a direct output of
the bypass switch enable signal.
Table 2: ACT88430 PG Input Choices
The ACT88430 buck regulators are highly configurable
and can be quickly and easily reconfigured via I2C. This
allows them to support changes in hardware require-
ments without the need for PCB changes. Examples of
I2C functionality are given below:
Allowable PG Inputs
Buck1
Buck2
Buck3
Real-time power good, OV, and current limit status
Ability to mask individual faults
Dynamically change output voltage
On/Off control
Buck4
LDO1
LDO2 AND Buck4
LDO3 AND Buck4
Softstart ramp
Slew rate control
PG is configurable, so refer to the back of the datasheet
for its specific functionality for each CMI. PG is an open
drain output and is 5V tolerant meaning that PG can be
pulled up to 5.5V even if VIO_IN is less than 5.5V.
Switching delay and phase control
Low power mode
Overcurrent thresholds
Step-down dc/dc Converters
General Description
Refer to the Active-Semi Application Note describing
the Register Map for full details on I2C functionality and
programming ranges.
The ACT88430 contains four fully integrated step-down
converters. Buck1 is a 4A output, while Buck2, Buck3,
and Buck4 are 2.5A outputs. All buck converters are
fixed frequency, current-mode controlled, synchronous
PWM converters that achieve peak efficiencies of up to
96.5%. The buck converters switch at 2.25MHz and are
internally compensated, requiring only three small ex-
ternal components (Cin, Cout, and L) for operation.
They ship with default output voltages that can be mod-
ified via the I2C interface for systems that require ad-
vanced power management functions.
Operating Mode
The buck converters operate in fixed-frequency PWM
mode at medium to heavy loads. They transition to a
proprietary power-saving low power mode (LPM) at light
loads in order to save power. Each buck converter’s
LPM can be independently enabled or disabled via its
DISLPM I2C bit. Setting DISLPM = 0 enables LPM while
setting DISLPM = 1 disables LPM. Disabling LPM effec-
tively puts the regulator into forced PWM mode. Oper-
ating in LPM saves power, while operating in forced
PWM mode gives better transient response.
Each buck converter has a dedicated input pin and
power ground pin. Each buck converter should have a
dedicated input capacitor that is optimally placed to min-
imize the power routing loops for each buck converter.
Note that even though each buck converter has sepa-
rate inputs, all buck converter inputs must be connected
to the same voltage potential.
Synchronous Rectification
Buck1/2/3/4 each feature integrated synchronous recti-
fiers (or LS FETs) to maximize efficiency and minimize
the total solution size and cost by eliminating the need
for external rectifiers.
Buck1 is configurable as a bypass switch for systems
with a 3.3V bus voltage. The bypass switch provides full
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