ACT88430QJ-T
Rev 1.0, 24-Oct-2018
a pullup resistor. Signals on these pins must meet tim-
ing requirements in the Electrical Characteristics Table.
SYSTEM CONTROL INFORMATION
General
Table 1: ACT88430 I2C Addresses
The ACT88430 is a single-chip integrated power man-
agement solution designed to power many processors.
It integrates four highly efficient buck regulators, three
LDOs, and an integrated load bypass switch. Its high
integration and high switching frequency result in an ex-
tremely small footprint and lost power solution. It con-
tains a master controller that manages startup sequenc-
ing, timing, voltages, slew rates, sleep states, and fault
conditions. I2C configurability allows system level
changes without the need for costly PCB changes. The
built-in load bypass switch enables full sequencing con-
figurability in 3.3V systems.
7-Bit Slave Address
8-Bit Write
Address
0xA6h
0xAAh
0xB4h
8-Bit Read
Address
0xA7h
0xABh
0xB5h
0x53h
0x55h
0x5Ah
0x5Bh
101 0011b
101 0101b
101 1010b
101 1011b
0xB6h
0xB7h
I2C Registers
The ACT88430 has an array of internal registers that
contain the IC’s basic instructions for setting up the IC
configuration, output voltages, switching frequency,
fault thresholds, fault masks, etc. These registers give
the IC its operating flexibility. The two types of registers
are described below.
The ACT88430 master controller monitors all outputs
and reports faults via I2C and hardwired status signals.
Faults can masked and fault levels and responses are
configurable via I2C.
Basic Volatile – These are R/W (Read and Write) and
RO (Read only). After the IC is powered, the user can
modify the R/W register values to change IC functional-
ity. Changes in functionality include things like masking
certain faults. The RO registers communicate IC status
such as fault conditions. Any changes to these registers
are lost when power is recycled. The default values are
fixed and cannot be changed by the factory or the end
user.
Many of the ACT88430 pins and functions are configu-
rable. The IC’s default functionality is defined by the de-
fault CMI (Code Matrix Index), but much of this function-
ality can be changed via I2C. The first part of the
datasheet describes basic IC functionality and default
pin functions. The end of the datasheet provides the
configuration and functionality specific to each CMI ver-
sion. Contact sales@active-semi.com for additional in-
formation about other configurations.
Basic Non-Volatile – These are R/W and RO. After the
IC is powered, the user can modify the R/W register val-
ues to change IC functionality. Changes in functionality
include things like output voltage settings, startup delay
time, and current limit thresholds. Any changes to these
registers are lost when power is recycled. The default
values can be modified at the factory to optimize IC
functionality for specific applications. Please consult
sales@active-semi.com for custom options and mini-
mum order quantities.
I2C Serial Interface
To ensure compatibility with a wide range of systems,
the ACT88430 uses standard I2C commands. The
ACT88430 always operates as a slave device, and is
addressed using a 7-bit slave address followed by an
eighth bit, which indicates whether the transaction is a
read-operation or a write-operation. As an example, the
7-bit slave address 0x5Ah follows the format 1011010x
where “x” is a 0 for write operation and 1 for a read op-
eration. This results in 0xB4h for write operations and
0xB5h for read operations. Refer to each specific CMI
for the IC’s slave address
When modifying only certain bits within a register, take
care to not inadvertently change other bits. Inadvert-
ently changing register contents can lead to unexpected
device behavior.
There is no timeout function in the I2C packet pro-
cessing state machine, however, any time the I2C state
machine receives a start bit command, it immediately
resets the packet processing, even if it is in the middle
of a valid packet.
State Machine
The ACT88430 contains an internal state machine with
five internal states.
RESET State
In the RESET, or “cold” state, the ACT88430 is waiting
for the input voltage on VIN to be within a valid range
defined by I2C bits POK_OV_SET and POK_UV_SET.
All regulators are off in RESET. nRESET, nRE-
SET_AUX1, and nRESET_AUX2 are asserted low. All
volatile registers are reset to defaults and Non-Volatile
registers are reset to programmed defaults. The IC tran-
sitions from RESET to ACTIVE when the input voltage
The ACT88430 holds the I2C state machine in reset dur-
ing the RESET, Idle, OVUVFLT, and THERMAL states
to avoid a corruption of registers when the voltage reg-
ulators are out of spec.
I2C commands are communicated using the SCL and
SDA pins. SCL is the I2C serial clock input. SDA is the
data input and output. SDA is open drain and must have
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