MIL-PRF-38535K
TABLE V. Group D tests (Package related test) . - Continued.
MIL-STD-883 test method and conditions
Test
1/
Subgroups
Class Q
Class V
Class Y
(class level B)
(class level S)
(class level S)
Subgroup 8
sample size 5(0)
2/
Lid torque 15/
Where applicable
TM 2024
Where applicable
TM 2024
Where applicable
TM 2024
Where applicable
a. TM 2036
Where applicable
a. TM 2036
Where applicable
a. TM 2036
Subgroup 9
sample size 3(0)
(3 leads minimum)
16/
a. Soldering heat
b. Seal
b. TM 1014 condition as
applicable
b. TM 1014 condition as
applicable
b. 5/
(1) Fine leak
(2) Gross leak
c. External Visual
examination
c. TM 2009
c. TM 2009
c. TM 2009
d. End-point electrical
d. As specified in the
applicable device
specification
d. As specified in the
applicable device
specification
d. As specified in the
applicable device
specification
Note: The screening and QCI/TCI tables from MIL-PRF-38535 and MIL-STD-883 Test Methods 5004 and 5005 have been
combined for consistency. A future revision of MIL-STD-883 will reflect this change as well. Manufacturers shall document in
their QM plan the screening and QCI/TCI requirements to either MIL-PRF-38535 or MIL-STD-883.
1/ In-line monitor data may be substituted for subgroups D1, D2, D6, D7, and D8 upon approval by the qualifying activity. The
monitors shall be performed by package type and to the specified subgroup test method(s). The monitor sample shall be taken at
a point where no further parameter change occurs, using a sample size and frequency of equal or greater severity than specified
in the particular subgroup. The in-line monitor data shall be traceable to the specific inspection lot(s) represented (accepted or
rejected) by the data.
2/ Electrical reject devices from that same inspection lot may be used for samples. For devices with solder terminations,
subgroups 1, 2, 5 and 8 tests shall be performed with balls and columns.
3/ The sample size number of 45, C = 0 for lead integrity shall be based on the number of leads or terminals tested and shall be
taken from a minimum of 3 devices. All devices required for the lead integrity test shall pass the seal test if applicable (see 4/) in
order to meet the requirements of subgroup 2. For leaded chip carrier packages, use condition B1. For pin grid array leads and
rigid leads, use TM 2028. For leadless chip carrier packages only, use test condition D and a sample size number of 15 (C = 0)
based on the number of pads tested taken from 3 devices minimum. For LGA/BGA/CGA packages, TM 2004 does not apply.
4/ Seal test (subgroup 2b) need be performed only on packages having leads exiting through a glass seal.
5/ This test is not applicable for class Y non-hermetic microcircuits devices.
6/ Devices used in subgroup 3, "Thermal and Moisture Resistance" may be used in subgroup 4, "Mechanical".
32
ACTEL [ Actel Corporation ]
