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5962-0421901QUA 参数 Datasheet PDF下载

5962-0421901QUA图片预览
型号: 5962-0421901QUA
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 250000 Gates, CMOS, CPGA624, CERAMIC, CGA-624]
分类和应用: 可编程逻辑
文件页数/大小: 217 页 / 1554 K
品牌: ACTEL [ Actel Corporation ]
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MIL-PRF-38535K  
APPENDIX H  
H.3.2.1.2 Wafer fabrication. This includes the manufacturer’s in-house fabrication or the subcontractor’s fabrication. The  
wafer fabrication quality systems and controls include statistical process control (SPC) and in-process monitoring programs  
including the technology characterization vehicle (TCV) program or the Standard Evaluation Circuit (SEC) and parametric  
monitors (PMs) or alternate assessment procedure with the approval of qualifying activity (QA).  
As part of certification, the manufacturer should identify a specific technology or technologies for the wafer fabrication. A  
technology consists of the fabrication sequence, design rules and electrical characteristics. Demonstration of wafer fabrication  
capability consists of the fabrication sequence, design rules, electrical characteristics, and process information. All supporting  
documentation and data shall be made available to the qualifying activity before or during the management and technology  
validation (see G.3.2.2.1).  
A plan shall also be presented that provides for an on-going reliability monitor and failure rate calculations.  
H.3.2.1.2.1 Wafer fabrication checklist (Class level S) . The following items shall be used as minimum requirements, as  
applicable for the technology, for the manufacturer and QA in evaluating the new technology for class level S product:  
a. Process development  
(1) Design of experiments (This information may not be readily available for older technologies especially when a  
process is transferred from another facility).  
(2) Process sensitivity (This will define what parameters within the process would identify if the process is stable or  
marginal. Process variation is different and shows the process can yield even when the parameters are at  
minimum or maximum).  
(3) Modeling and simulation.  
(4) Producibility and yield analysis.  
b. Process characterization.  
(1) Voltage.  
(2) Temperature (Minimum range of -55°C to +125°C, otherwise provide justification).  
(3) Process variability.  
(4) Best and worst case or statistical simulation models considering independent variation of device types (e.g. NFET  
and PFET).  
(5) Frequency (Defined by the electrical requirements of the device specification).  
(6) Radiation (see appendix C), if applicable.  
(7) Performance margins (until failure).  
(8) Process optimization.  
(9) Process maturity assessment.  
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