W89C840F
EEPROM hardware reset auto load and software programming function
The following configuration parameters should be stored in a EEPROM device for configuring
the W89C840F and can be loaded into the corresponding configuration register while power-on reset
occurring.
1) the 6 bytes Ethernet ID.
2) the 2 bytes subsystem ID.
3) the 2 bytes subsystem vendor ID.
4) the 2 bytes device ID.
5) the 2 bytes vendor ID.
6) the 1 bytes revision ID.
7) the 1 byte booting device size
8) the 1 byte maximum latency
9) the 1 byte minimum grant
The data mapping and its offset address for all of the above parameters are as the following
table.
Address
09H~3FH
08H
High Byte (BIT 15 ~ BIT 8)
reserved
Low Byte (BIT 7 ~ BIT 0)
reserved
C48
Revision ID
07H
Vendor ID(high byte)
Device ID(high byte)
Subsystem Vendor ID(high byte)
Subsystem ID(high byte)
MAXLAT
Vendor ID(low byte)
Device ID(low byte)
Subsystem Vendor ID(low byte)
Subsystem ID(Low byte)
MINGNT
06H
05H
04H
03H
02H
Ethernet Address 5
Ethernet Address 3
Ethernet Address 1
Ethernet Address 4
Ethernet Address 2
Ethernet Address 0
01H
00H
The W89C840F will generate a nine-word reading command to the EEPROM to read the
configuration data and store these data into the configuration registers and the control register of the
W89C840F after hardware reset. The serial EEPROM 93C06 or 93C46 will be the choice as the
storage device for storing these configuration data.
Ot her t han bei ng r ead after hardware reset, the EEPROM can be read by the application
program. The C24/CMIIR register provides an alternative path to access the data in EEPROM. The
bits 0, 1, 2, ... and 7 of CMIIR are general I/O port. When t he bi t 11 of CMI I R i s set high, the
bits 0, 1 and 2 will be r espect i vel y put on the EECS, BtAdata1/EECK, and Bt Adat a2/ EEDI to
trigger EEPROM. The data from EEPROM running over the pin BtAdata3/EEDO will be hold and
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ETC [ ETC ]
