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W89C840F 参数 Datasheet PDF下载

W89C840F图片预览
型号: W89C840F
PDF下载: 下载PDF文件 查看货源
内容描述: 局域网节点控制器\n [LAN NODE CONTROLLER ]
分类和应用: 控制器局域网
文件页数/大小: 72 页 / 708 K
品牌: ETC [ ETC ]
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W89C840F  
The following figures describe the ring structures of receive descriptor.  
first descritpor of Rx descriptor list  
status register  
data buffer 1  
data buffer 2  
for storing the first RX packet data  
structure constructing register  
data buffer 1 pointer  
for storing the first RX packet data  
data buffer 2 pointer  
second descritpor of Rx descriptor list  
status register  
data buffer 1  
data buffer 2  
for storing the 2nd RX packet data  
for storing the 2nd RX packet data  
structure constructing register  
data buffer 1 pointer  
data buffer 2 pointer  
third descritpor of Rx descriptor list  
status register  
data buffer 1  
data buffer 2  
for storing the 3rd RX packet data  
for storing the 3rd RX packet data  
structure constructing register  
data buffer 1 pointer  
data buffer 2 pointer  
last descritpor of Rx descriptor list  
status register  
data buffer 1  
data buffer 2  
for storing the nth RX packet data  
for storing the nth RX packet data  
structure constructing register  
data buffer 1 pointer  
data buffer 2 pointer  
The software driver can request mor e t han one descr i pt or and dat a buf f er at a time. As  
described in the above diagram, the total descriptors are constructed as a ring. A packet can be stored in  
more than one data buffer. In that case, the data buffer 1 is stored first and then data buffer 2. If a packet  
contains more data than the two data buffers can accommodate, it fetches the next descriptor and two new  
data buffers to save the extra more data. That is a packet can be stor ed i n mor e t han one descr i pt or .  
In the contrary, a descriptor is not allowed to hold more than one packet. If the data buffer 1 can completely  
store the received packet, the data buffer 2 will be left empty and the next packet will be firstly stored at the  
data buffer 1 in the next descriptor. The diagram shown above is just one case of the buffer application.  
When the last descriptor is used by a received packet, the next descriptor should be the first descriptor of  
the ring. Once the descriptors are processed by the driver, it can be released to the ring for later use. In the  
ring structure, the start address of the next descriptor is specified by the skip length, det er mi ned by bit2  
to bit6 of C00/CBCR register, and the start address of the first descriptor is specified by the C0C/CRDLA  
register.  
. For the descriptors with the chain structure, host is allowed to allocate scatterly a block of memory  
with the size of 4 long words, linked by the pointer which located at the next descriptor pointer field.  
Each descriptor has only one link to a data buffer to store the received packet data. The descr i pt or s  
l ocat e r andoml y linked by the second pointer in each descriptor, which points to the start address of the  
next descriptor.  
Publication Release Date:April 1997  
- 11 -  
Revision A1  
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