Microelectronics
Inc.
Electronic ID Mode
BRIGHT
BM29F400T/BM29F400B
The Electronic ID mode allows the reading out of a binary code from the device and will identify its
manufacturer and device type. This mode is intended for use by programming equipment for the
purpose of automatically matching the device to be programmed with its corresponding programming
algorithm. This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force V
ID
(11.5V to 12.5V) on address pin
A9. Two identifier bytes may then be sequenced from the device outputs by toggling address A0 from
V
IL
to V
IH
. All addresses are don't cares except A0, A1, and A6 (see Table 3).
Manufacturer and device codes may also be read via the command register; for instance, when the
BM29F400 is erased or programmed in a system without access to high voltage on the A9 pin. The
command sequence is illustrated in Table 6 (refer to Electronic ID Command section).
Byte 0 (A0 = V
IL
) represents the manufacturer's code (Bright Microelectronics = ADH) and byte 1 (A0
= V
IH
) the device identifier code (BM29F400T = 23H and BM29F400B = ABH for 8-bit mode;
BM29F400T = 2223H and BM29F400B = 22ABH for 16-bit mode). These two byte words are given in
Table 3. To read the proper device codes when executing the Electronic ID, all identifiers for
manufacturer and device will exhibit odd parity with the MSB (DQ7) defined as the parity bit. A1 must
be V
IL
(see Table 3).
Read Mode
The BM29F400 has three control functions which must be satisfied in order to obtain data at the
outputs.
CE
is the power control and should be used for device selection.
OE
is the output control
and should be used to gate data to the output pins if a device is selected. As shown in Table 1,
WE
should be held at V
IH
, except in Write mode and Enable Sector Protect mode.
Address access time (t
ACC
) is equal to the delay from stable addresses to valid output data. Chip
enable access time (t
CE
) is the delay from stable addresses and stable CE to valid data at the output
pins. Output enable access time is the delay from the falling edge of
OE
to valid data at the output
pins (assuming the addresses have been stable for at least t
ACC
−t
OE
time).
Standby Mode and Hardware RESET Standby Mode
The BM29F400 has two methods for implementing standby mode. The first method requires use of
both the
CE
pin and the
RESET
pin. The second method only requires use of the
RESET
pin.
When using both pins, a CMOS standby mode is achieved when both
CE
and
RESET
are held at
Vcc
±0.5V.
In this condition, the current consumed is typically less than 100
µA.
A TTL standby mode
is achieved with both
CE
and
RESET
held at V
IH
. In this condition, the typical current required is
reduced to 200
µA.
The device can be read with standard access time (t
CE
) from either of these two
standby modes.
When using the
RESET
pin only, a CMOS standby mode is achieved with
RESET
held at V
SS
±0.5V.
In this condition, the current consumed is typically less than 100
µA.
A TTL standby mode is
achieved with RESET held at V
IL
. In this condition, the typical current required is reduced to 1 mA.
Once the RESET pin is taken high, the device requires 500 nS of wake-up time before outputs are
valid for a read access.
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