BRIGHT
Microelectronics
Inc.
BLOCK DIAGRAM
Preliminary BM29F040
DQ
0
- DQ
Vcc
GND
Erase Voltage
Generator
7
Input / output
Buffers
WE
State
Control
Command
Register
Program Voltage
Generator
CE
OE
Vcc Detect
Timer
A
d
d
r
e
s
s
L
a
t
c
h
Chip Enable
Output Enable
Logic
Data
latch
Y-Decode
Y-MUX / SENSING
X-decode
ARRAY
A
0
- A
18
Figure 1
BUS OPERATION
Operation
Auto select Manufacturers ID (1)
Auto select Device ID (1)
Read
Standby
Output Disable
Write
Enable Sector Protect
Verify Sector Protect (3)
CE
OE
WE
A0
L
H
A
0
X
X
A
0
X
L
A1
L
L
A
1
X
X
A
1
X
H
A6
L
L
A
6
X
X
A
6
X
L
A9
V
ID
V
ID
A
9
X
X
A
9
V
ID
V
ID
I/O
Code
Code
Dout
High Z
High Z
Din (2)
X
Code
L
L
L
H
L
L
L
L
L
L
L
X
H
H
V
ID
L
H
H
H
X
H
L
L
H
Table 4
Notes:
1. LEGENDS: L = V
IL
, H = V
IH
, X = don't care, V
ID
= +12V.
2. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to table 6 for
Command definitions.
3. Refer to Table 4 for valid Din during a write operation.
4. Refer to the section on sector protection.
A Winbond Company
-5-
Publication Release Date: June 1999
Revision A1
WINBOND [ WINBOND ]
