W159B
system timing margins. The use of spread spectrum
modulation is controlled by an external signal input.
and the frequency deviation or spread. The equation for the
reduction is
The W1±9B also includes power management control inputs.
By using these inputs, system logic can stop CPU and/or PCI
clocks or power down the entire device to conserve system
power.
dB = 6.5 + 9*log10(P) + 9*log10(F)
Where P is the percentage of deviation and F is the frequency
in MHz where the reduction is measured.
The output clock is modulated with a waveform depicted in
Figure 2. This waveform, as discussed in “Spread Spectrum
Clock Generation for the Reduction of Radiated Emissions” by
Bush, Fessler, and Hardin produces the maximum reduction
in the amplitude of radiated electromagnetic emissions. The
deviation selected for this chip is –0.±% downspread. Figure
2 details the Cypress spreading pattern. Cypress does offer
options with more spread and greater EMI reduction. Contact
your local Sales representative for details on these devices.
Spread Spectrum Generator
The device generates a clock that is frequency modulated in
order to increase the bandwidth that it occupies. By increasing
the bandwidth of the fundamental and its harmonics, the ampli-
tudes of the radiated electromagnetic emissions are reduced.
This effect is depicted in Figure 1.
As shown in Figure 1, a harmonic of a modulated clock has a
much lower amplitude than that of an unmodulated signal. The
reduction in amplitude is dependent on the harmonic number
Spread Spectrum clocking is activated or deactivated by
selecting the appropriate values for the SPREAD# input pin.
Highest Peak
Spread
Spectrum
Enabled
Non-
Spread
Spectrum
Figure 1. Clock Harmonic with and without SSCG Modulation Frequency Domain Representation
100%
80%
60%
40%
20%
0%
–20%
–40%
–60%
–80%
–100%
Time
Figure 2. Modulation Waveform Profile
Rev 1.0,November 21, 2006
Page 3 of 10
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