FEDL87V2107-01
OKI Semiconductor
ML87V2107
3.2.4 Horizontal Sync. Signal Width Adjustment Settings
The width of OHS that is generated in this IC can be set up to 255 pixels in 255 levels by setting the I2C-bus
setting register SHW[7:0](SUB:6Ch-bit[7:0]). However, when SWH[7:0] = 0h is set, OHS is not generated.
*This setting is not allowed in composite SYNC mode.
Table F3-2-4 OHS Width Adjustment Setting
OHS Width
SHW[7:0] = 01h
1 (OCLK)
……
……
SHW[7:0] = 80h
128 (OCLK)
……
……
SHW[7:0] = FFh
255 (OCLK)
1 pixel
OHS
OHS
OHS
128 pixels
255 pixels
Figure F3-2-4 OHS Width Adjustment
3.2.5 Front Porch Phase Adjustment Setting
OVS and OHS that are generated in this IC can be output by adjusting the delay from the internal H (INTOHS)
signal by up to 255 pixels in 256 levels by setting the I2C-bus setting register SYDL[7:0] (SUB:6Dh-bit[7:0]).
Consequently, Sync. signal front porch adjustments are enabled at analog video signal conversion.
Table F3-2-5 Front Porch Phase Adjustment Setting
Front porch position
SYDL[7:0] = 00h
0(OCLK)
SYDL[7:0] = 80h
128 (OCLK)
SYDL[7:0] = FFh
255 (OCLK)
……
……
……
……
INTOHS
OHS
SYDL[7:0]
OVS
Figure F3-2-5 Front Porch Phase Adjustment Setting
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